Since AMD’s relaunch into high-performance x86 processor design, one of the fundamental targets for the company was to be a competitive force in the data center. By having a competitive product that customers could trust, the goal has always been to target what the customer wants, and subsequently grow market share and revenue. Since the launch of 3rd Generation EPYC, AMD is growing its enterprise revenue at a good pace, however questions always turn around to what the roadmap might hold. In the past, AMD has disclosed that its 4th Generation EPYC, known as Genoa, would be coming in 2022 with Zen 4 cores built on TSMC 5nm. Today, AMD is expanding the Zen 4 family with another segment of cloud-optimized processors called Bergamo.

As part of AMD’s Data Center event today, the company is showcasing that its 4th Generation EPYC roadmap will consist of two segments: Genoa, with up to 96 Zen 4 cores, and Bergamo, with up to 128 Zen 4c cores. Not only are we getting official confirmation of core counts, but AMD is disclosing that Bergamo will be using a different type of core: the Zen 4c core.

The ‘c’ in this instance means ‘cloud optimized’. AMD has built two different forms of Zen 4 core, one for most applications, and a higher density version for the cloud. This means that these two cores, while functionally identical, will use different sets of masks. The Zen 4c core has been redesigned to have the same functionality but offer more density combined with a different power/performance point on the voltage frequency curve. This is going to affect power consumption, efficiency, and likely the range of frequencies available. AMD confirmed that Bergamo is likely to see the power window of enterprise CPUs expand too: normally we see server CPUs in the 65-280W range, but Zen4/4c will go further (in both directions) to cater for specific cloud use cases that might rely on density, performance, or efficiency. The Zen4c core is likely to be smaller in order to fit 128 cores, and have different amounts of cache to Zen4, so there could be an IPC difference to the traditional Zen4 core.

AMD has stated to us in our briefing that Genoa and Bergamo will be socket compatible, with Genoa coming in the 2022 timeframe, while Bergamo in late 2022/early 2023 (with a focus more on the early 2023 target). When asked, AMD did not want to narrow down the Genoa timeframe in a similar light. Bergamo however will have the same features as Genoa: DDR5, PCIe 5.0, CXL 1.1, RAS, and AMD's security suite.

The use of two different core optimization points is going to be an interesting one for AMD. Normally it creates one core chiplet design that can be used across consumer and server processors, but the development of a Zen 4c chiplet now means the company has to manage stock of both independently. Also, both being on 5nm means that the mask development costs are likely to be double than a singular design across all. AMD did not disclose any new details about a centralized IO die – what is on it, or where it was made.

The Zen 4c chiplet, according to AMD, is built on an HPC variant of TSMC N5. This aims at denser logic and denser cache, likely at the expense of high-end frequency. AMD says that this process offers 2x density, 2x power efficiency, and >1.25x silicon performance over the regular N7 it uses. When asked if this was a specific statement about core performance, AMD said that it wasn’t, and just a comment on the process node technologies. It is worth noting that 2x efficiency is quite a substantial claim based on metrics provided by TSMC on its N7 -> N5 disclosures.

With Bergamo targeted specifically for the cloud, and cloud instances, I wonder if we will ever get to test it in a local system akin to a regular review. One of AMD’s features in previous generation EPYCs is processor locking, which limits a CPU to a particular vendor’s motherboards. We’ve seen this with some of Lenovo’s systems, for example. This feature allows for supply chain control, which is requested by certain customers.

We are told that more information is to follow in the coming months.

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  • nandnandnand - Monday, November 8, 2021 - link

    https://videocardz.com/newz/zen-4-dense-zen4d-migh...

    The name change is probably for the best.

    Zen 5 + Zen 4c coming in 2023.
    Reply
  • Silver5urfer - Monday, November 8, 2021 - link

    4C is cloud optimized. How is that leak from MLID is going to be 100% accurate that the Zen 5 + 4c is coming to Consumer platforms ? Reply
  • nandnandnand - Monday, November 8, 2021 - link

    Is it really "cloud-optimized" or is that a buzzphrase?

    If they make changes to Zen 4c and call it Zen 4d, then they can't use different binning of the same chiplet for both the Bergamo and Granite Ridge product lines.
    Reply
  • ET - Monday, November 8, 2021 - link

    I can see AMD using 4c, although more for mobile than for AM5. I'm not sure why Zen 5 has a relation to this. If 4c is useful alongside 5, won't it be just as useful (if not more) alongside 4? Perhaps it's just a matter of time to market, but that would only work out if Zen 4 is not Q4 2022, or Zen 5 is not that far behind 4c. Reply
  • Matthias B V - Monday, November 8, 2021 - link

    It is interesting that they can double core count by cutting cache. Intel at the same time developed a specific core to achieve similar.

    This really shows how bad cache is scaling and why we might see L3 been taken off the chiplets and completely stacked one day!

    Wondering if Zen4C and Zen4D are the same and just incorrect leaks or if AMD differs between servers 4C and consumers 4D...
    Reply
  • nandnandnand - Monday, November 8, 2021 - link

    That makes sense but previous Epyc products share the same chiplets as Ryzen/Threadripper despite having more features, so why call them two different things? I guess there could be some additional tweaks to the amount of cache and such.

    You look at something like Renoir, it has half the L3 of Cezanne, and 1/4 as much available to each core, but it's not awful. A 16-core Zen 4c/d chiplet should still have a decent amount of cache, presumably organized into two 8-core CCXs.
    Reply
  • nandnandnand - Monday, November 8, 2021 - link

    I looked at the latest MLID video and it looks like he just replaced 4D with 4c. It could have been a last minute name change by AMD. Reply
  • Dodozoid - Tuesday, November 9, 2021 - link

    Or AMD seeded different parts of the company with different variations of the name to see where the leaks are coming from... Reply
  • atomt - Monday, November 8, 2021 - link

    96 cores to 128 cores is not quite a doubling, though? :) Reply
  • Kevin G - Wednesday, November 10, 2021 - link

    The amusing thing is that AMD is using the same IO die. If the Zen 4c chiplets use one link to the IO die like normal Zen 4 chiplets, then a 192 core package is feasible. I suspect physical space and power limitations are the reasons why AMD isn't aiming that high. Reply

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