AMD Zen 2 Microarchitecture Analysis: Ryzen 3000 and EPYC Rome
by Dr. Ian Cutress on June 10, 2019 7:22 PM EST- Posted in
- CPUs
- AMD
- Ryzen
- EPYC
- Infinity Fabric
- PCIe 4.0
- Zen 2
- Rome
- Ryzen 3000
- Ryzen 3rd Gen
Decode
For the decode stage, the main uptick here is the micro-op cache. By doubling in size from 2K entry to 4K entry, it will hold more decoded operations than before, which means it should experience a lot of reuse. In order to facilitate that use, AMD has increased the dispatch rate from the micro-op cache into the buffers up to 8 fused instructions. Assuming that AMD can bypass its decoders often, this should be a very efficient block of silicon.
What makes the 4K entry more impressive is when we compare it to the competition. In Intel’s Skylake family, the micro-op cache in those cores are only 1.5K entry. Intel increased the size by 50% for Ice Lake to 2.25K, but that core is coming to mobile platforms later this year and perhaps to servers next year. By comparison AMD’s Zen 2 core will cover the gamut from consumer to enterprise. Also at this time we can compare it to Arm’s A77 CPU micro-op cache, which is 1.5K entry, however that cache is Arm’s first micro-op cache design for a core.
The decoders in Zen 2 stay the same, we still have access to four complex decoders (compared to Intel’s 1 complex + 4 simple decoders), and decoded instructions are cached into the micro-op cache as well as dispatched into the micro-op queue.
AMD has also stated that it has improved its micro-op fusion algorithm, although did not go into detail as to how this affects performance. Current micro-op fusion conversion is already pretty good, so it would be interesting to see what AMD have done here. Compared to Zen and Zen+, based on the support for AVX2, it does mean that the decoder doesn’t need to crack an AVX2 instruction into two micro-ops: AVX2 is now a single micro-op through the pipeline.
Going beyond the decoders, the micro-op queue and dispatch can feed six micro-ops per cycle into the schedulers. This is slightly imbalanced however, as AMD has independent integer and floating point schedulers: the integer scheduler can accept six micro-ops per cycle, whereas the floating point scheduler can only accept four. The dispatch can simultaneously send micro-ops to both at the same time however.
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The_Assimilator - Wednesday, June 12, 2019 - link
The original version of this article noted the 3950X price wasn't confirmed at the time of publication, but it seems they edited that bit out after Su's presentation.Still need the table to be updated - PCIe and DDR4 columns at least.
vFunct - Tuesday, June 11, 2019 - link
Eventually these Multi-chip packages should incorporate system DRAM (via HBM) as well as SSD NVRAM and GPUs, and sold as full packages that you'd typically see in common configurations. 64GB memory + 1TB SSD + 16 CPU cores + whatever GPU.mode_13h - Tuesday, June 11, 2019 - link
GPUs are often upgraded more often than CPUs. And GPUs dissipate up to about 300 W, while desktop CPUs often around 100 W (except for Intel's Coffee Lake).So, it wouldn't really seem like CPUs and GPUs belong together, either from an upgrade or a cooling perspective. Consoles can make it work by virtue of being custom form factor and obviously you don't upgrade a console's GPU or CPU - you just buy a new console.
Therefore, I don't see this grand unification happening for performance-oriented desktops. That said, APUs will probably continue to get more powerful and perhaps occupy ever more of the laptop market.
Threska - Tuesday, June 11, 2019 - link
I imagine that's why there's PCIe 4.0 and now 5.0.R3MF - Tuesday, June 11, 2019 - link
memory support?3200 official, or higher...
SquarePeg - Tuesday, June 11, 2019 - link
According to AMD 3200mhz is officially supported but they (AMD) have had memory clocked to over 5000mhz. Infinity fabric will run 1:1 with up to 3733mhz ram but any higher and it splits to 2:1. AMD also said that they have found DDR4 3600 16-21-21 to be the best bang for buck on performance returns.R3MF - Wednesday, June 12, 2019 - link
cheersGastec - Wednesday, June 12, 2019 - link
But will those be 3200 MHz overclocked (XMP) or 3200 SPD?Cooe - Wednesday, June 12, 2019 - link
The latter. Only >3200MHz is now overclocked.Lord of the Bored - Tuesday, June 11, 2019 - link
That security slide, though...Most of a page of "N/A"
I love it.