How To Treat a 1+4 Hybrid CPU

At the top of the article, I explained that the reason for using two different types of processor core, one big on performance and the other big on efficiency, was that users could get the best of both worlds depending on if a workload could be run efficiently in the background, or needed the high performance for a user experience interaction. You may have caught onto the fact that I also stated that because Intel is using a 1+4 design, it actually makes more sense for multi-threaded workloads to run on the four Atom cores.

Using a similar power/performance graphs, the effect of having a 1+4 design is quite substantial. On the left is the single core power/performance graphs, but on the right is when we compare 1 Sunny Cove to all 4 Tremont cores working together.

 

Where the previous graph considered a 1+1 design, which is more relevant in those user experience scenarios listed above, on the right is the 1+4 design for when the user demands a heavier workload that might not be latency critical. Because there are four Atom cores, the blue line multiplies by four in both directions.

Now obviously the real world scenario is somewhere between the two, as it is possible to use only one, two, or three of the smaller cores at any given time. The CPU and the OS is expected to know this, so it can govern when workloads that can be split across multiple cores end up on either the big core or the small core.

In this graph from Intel, we have three distinct modes on which threads can operate.

  • ‘Sunny Cove/SNC’ is for responsiveness and user experience threads,
  • ‘Tremont/TNT Foreground’, for user related tasks that require multiple threads that the user is waiting on.
  • ‘Tremont/TNT Background’, for non-user related tasks run in efficiency mode

Even though the example here is web browsing, it might be best to consider something a bit beefier, like video encoding.

If we run video encoding, because it is a user related task that requires multiple threads, it will run on the four Tremont cores (TNT FG). Anything that Windows wants to do alongside that gets scheduled as TNT BG. If we then open up the start menu, because that is a responsiveness task, that gets scheduled on the SNC core.

Is 1+4 the Correct Configuration?

Intel here has implemented a 1+4 core design, however in the smartphone space, things are seen a little differently. The most popular configuration, by far, is a 4+4 design, simply because a lot of smartphone code is written to take advantage of multiple foreground or multiple background threads. There are a number of cost-down designs that reduce die area and power by going for a 2+4 implementation. Everyone seems adamant that 4 is a good number for the smaller cores, partly because they are small and cheap to add, but because Arm’s quad-core implementation is a base unit for its IP.

The smartphone space in recent quarters has also evolved from a two tier system of cores. In some of the more leading edge designs, we now have three types of core: a big, a middle, and a small. Because of the tendency to stay with eight core designs, we now get 1+3+4 or 2+2+4 designs, powered by complex schedulers that manage where to put the threads for the best user experience, the best battery life, or somewhere in the middle. Mediatek has been famously dabbling in 10 core designs, going for a 2+4+4 approach.

One thing missing from all of these implementations is an SoC with one big core and four small cores. Smartphone vendors don’t seem to be interested in 1+4 silicon, and yet Intel has decided on it for Lakefield. This is borne out of decisions made on both sides.

From the smartphone perspective, when hybrid designs came about, the big cores just weren’t powerful enough on their own. In order to offer something more than simply basic, at least two cores were needed, but because of how Arm architected the big and little designs, it almost became standard to look into 4+4 implementations of big and small cores. It was only until this configuration was popularized over a couple of years, and Arm big cores got more powerful, that chip designs started looking at 2+4, or 1+3+4 designs.

On Intel’s side of the fence, the biggest problem it has is the size of the Sunny Cove core. By comparison, it’s really, really big. Because the graphics core is the same as Ice Lake and reuses its design, there simply isn’t enough room within the 82 mm2 compute die to add another core. Not only that, but there is a question of power. Sunny Cove wasn’t built for sub-1W operation, even in the Tremont design. We see big smartphone silicon pulling 4-5W when all eight cores are active – there is no way, based on our understanding of Intel’s designs, that we could see four (or even two) Sunny Cove cores being in the optimal performance per watt range while being that low. Intel’s Lakefield graphics, with 64 EUs, is running at only 500 MHz – a lot lower than the Ice Lake designs. Even if Intel moved that down to a 32 EU design to make space for another Sunny Cove core, I reckon that it would eat the power budget for breakfast and then some.

Intel has made the 1+4 design to act as a 0+4 design that sometimes has access to a higher performance mode. Whereas smartphone chips are designed for all eight cores to power on for sustained periods, Lakefield is built only for 0+4 sustained workloads. And that might ultimately be its downfall. This leads onto a deep discussion about Lakefield’s performance, and what we should expect from it.

Hybrid CPUs: Sunny Cove and Tremont Lakefield in Terms of Laptop Size
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  • Valantar - Sunday, July 5, 2020 - link

    Uhm, I have to ask, did you write this comment eight months ago? AMD has been kicking Intel's butt in 15W laptops since the first Renoir laptops hit the streets. While that did take a while after the initial presentation, their advantage is nonetheless significant both in performance and power draw.
  • serendip - Monday, July 6, 2020 - link

    AMD doesn't have anything in the 5W TDP range. Not yet, anyway. The problem is that Lakefield brings middling performance at a high price. Intel already has 5W and 4W parts, check out the Pentium 4425Y and m3-8100Y in the Surface Go 2. Those chips are much cheaper and easier to fab than Lakefield and they bring equal or higher performance.
  • Kangal - Tuesday, July 7, 2020 - link

    The best sku chipset that AMD makes in the "15W bracket" is the 4800U. However, that's with the TDP-down as it's not a proper 15W part. Plus, there are no laptops with that combination yet. The Lenovo Yoga Slim7 has the chipset, but it is at the 25W bracket, and apparently that goes much higher during use when possible.

    So no, AMD isn't quite kicking Intel's butt in the Ultrabook segment yet. Maybe in 6 months, when yields improve and more vendors join. But for now, Intel is still the dominant force in the Thin & Light segment. AMD they're killing it at the Regular Laptop market, the Entire Desktop Market, the Server market, and the Console market. However, ARM is pretty much going to take over the Server Market now that the big companies are moving that way, and since Linux drivers have matured on ARMv8_64. The laptop segment is safe for now, but the new Macs might cause other vendors to think beyond Windows, or think beyond x86. The Console segment and Desktop segments are safe for now (and for at least this decade).
  • Spunjji - Friday, July 10, 2020 - link

    That's an arbitrary distinction if ever I saw one. By that definition, Ice Lake is a 28W part operating in "TDP down" to 15W.

    AMD could conceivably laser 4 cores and 60% of the GPU off a Renoir chip, drop the clocks and end up with a "5W" part not dissimilar to Intel's M3 series. It wouldn't make any sense for them to do so, though, because they can't make enough chips as it is and it wouldn't really buy them any meaningful market share.
  • Kangal - Friday, July 10, 2020 - link

    I didn't discount the 4800U at all. I merely stated the fact that it is, in fact, a 25W chipset and it can operate at 15W with TDP-down. I'm not sure you quite understand this tier system.

    But anyways, my point was that AMD's best 15W option is the 4800U, but we don't know how it actually performs because there are no devices out there. From what we can speculate, it should be very competitive, but Intel really has championed the Ultrabook market in the last decade. So for all intents and purposes, Intel is probably still ahead here by a hair, yet they could've had a larger lead if they implemented the above design I tried to explain. Too bad. AMD will humiliate/supersede them completely in a year or two at this pace.
  • Spunjji - Monday, July 6, 2020 - link

    "And AMD would struggle to fit those technologies into a 8-core laptop processor, so there would be no threat from above."

    Boy, you really need to keep up with the news...
  • Kangal - Tuesday, July 7, 2020 - link

    No, you didn't read that correctly.
    AMD doesn't have any 8-core processor on their 16nm/14nm/12nm node, that is, confined to the thermal profile of a laptop. I was saying Intel needed to release the processor that I outlined, and release it years ago. And if they did that, then their only competition would be Renoir/Ryzen-4000, and even then AMD would lose on the low-voltage (Ultrabook) market and win on the regular (Laptop) market.

    See the above comment by serendip. AMD is working on having lower and lower voltage chips. Their lowest power one I think is still the V1605B embedded chip. But right now, that small company is really stretched thin. They're working on Servers, on HDD optimisations, on making GPUs, on optimising GPUs, on making console processors, on desktops, laptops, and a few other budget options.

    By the time AMD actually properly polishes the driverset for laptops/battery drain, it's going to be another year. But hopefully, on the next set of chips they update the graphics (from Vega to RDNA). It's possible they might ditch the monolithic design of their mobile chips, and shift those over to a chiplet design as well. This will take a hit to performance, and to efficiency... but on the bright side it should mean even cheaper processors to vendors and consumers-alike.
  • Spunjji - Friday, July 10, 2020 - link

    I think I understand now, but the phrasing was confusing!
  • eastcoast_pete - Thursday, July 2, 2020 - link

    It's beyond embarrassing, it's borderline idiotic. Intel's "performance" cores have one unique differentiator going for them, and that is the ability to execute AVX, especially AVX2 and AVX512 instructions. Doing what they did means they basically gelded their own big core, and this gelding won't win any performance crowns.
    I sort of get why it's hard to have a scheduler trying to work with cores that have different capabilities, but is it really impossible to have one that makes it a hard and fast rule that if an AVX instruction is called for, the big core gets fired up? Now, I am not able to program one of these myself, but, as a user, I would rather pay a little power consumption penalty and have a real Sunny Cove-like large core than an overgrown Atom as the "performance" core. Big mistake.
  • brantron - Thursday, July 2, 2020 - link

    The trouble with AVX on the Sunny Cove core is it will still only be one core.

    So add another, and call it...Ice Lake Y? Wait a minute... :p

    After more than a decade, Atom for PC still looks like a square peg in a round hole.

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