Intel has already disclosed that it will have a next generation Atom core, code named Tremont, which is to appear in products such as the Foveros-based hybrid Lakefield, as well as Snow Ridge designed for 5G deployments. In advance of the launch of the core and the product, it is customary for some documentation and tools to be updated to prepare for it; in this case, one of those updates has disclosed that the Tremont core would contain an L3 cache – a first for one of Intel’s Atom designs.
At Intel’s Architecture Day, the company showed off a new stacking technology called ‘Foveros’, which is designed to allows the company to make smaller chips. The idea behind Foveros...10 by Ian Cutress on 1/7/2019
Intel has recently updated its developer documentation for instruction set extensions, and in the process has disclosed information on both new instructions for and the codename of its next-generation...55 by Anton Shilov on 4/23/2018