Java Performance

Even though our testing is not the ideal case for AMD (you would probably choose 8 or even 16 back-ends), the EPYC edges out the Xeon 8176. Using 8 JVMs increases the gap from 1% to 4-5%. 

The Critical-jOPS metric is a throughput metric under response time constraint.

SPECJBB 2015-Multi Critical-jOPS  Huge Pages Impact

With this number of threads active, you can get much higher Critical-jOps by significantly increasing the RAM per JVM. However, we did not want that as this would mean we can not compare with systems that can only accommodate 128 GB of RAM. Notice how badly the Intel system needs huge pages. 

The benchmark data of Intel and AMD can be found below. 

According to AMD, the EPYC 7742 can be up to 66% faster. However note that these kind of high scores for critical-jOPS are sometimes configured with 1 TB of RAM and more. 

Java Performance: Max-jOPS HPC: NAMD
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  • ET - Thursday, August 8, 2019 - link

    I found the EPYC 7262 the most interesting SKU. By L3 cache size, that would be 4 chiplets, each offering only 2 cores. From the specs it looks like AMD has no shortage of 4 core chiplets, but I didn't expect 2 core chiplets.
  • Rudde - Friday, August 9, 2019 - link

    L3 cache is shared inside a CCX (4 cores), which suggests that every CCX has only one core available, but 16MB of L3 cache. I.e. every core has private L3 cache.
  • colonelclaw - Thursday, August 8, 2019 - link

    But can it serve Crysis Battle Royale?
  • shing3232 - Thursday, August 8, 2019 - link

    I am pretty sure it can lol
  • BigMamaInHouse - Thursday, August 8, 2019 - link

    @ Johan De Gelas will u test @240W TDP config?
  • JohanAnandtech - Thursday, August 8, 2019 - link

    Elaborate your interest in that, as it is only tad higher than the official 225W TDP?
  • BigMamaInHouse - Thursday, August 8, 2019 - link

    AMD is offering 225W/240W TDP option in bios to it's customers and lets them to decide if to go with better cooling and use 240W or stay at 225W, even though it looks small increase- in reality it should offer almost 10% more power headroom to the CPU chiplets -if you consider that the 225W is including ~55W for I/O die, so extra 15W for the chiplets alone should offer nice bump in clocks.
  • Gondalf - Thursday, August 8, 2019 - link

    Strange.....the article forgot Cooper Lake, out in Q4 this year and at major customers (for revenue) from at least two quarters. Same applies to Ice Lake SP that is in evaluation to OEMs right now.

    From the article looks like Intel is sleeping, but it is not at all. Ummm maybe Intel is snobbing some guys here not giving samples to test?? or informations to share??
    Bet Intel have to argue about the test suite or about compiler settings.........
  • JohanAnandtech - Thursday, August 8, 2019 - link

    Because Cooper Lake is still "warmed up Skylake" (unless I missed something). AFAIK it is Cascade Lake with 8 mem channels - so the 56-core socketed will probably be still in the 350-400W TDP range. So the SPEC benchmarks will look better, but getting that kind of server running inside your datacenter does not look very attractive: complex and thus expensive boards, high cooling and power distribution required. Looks like a chip that wins back benchmarks, but is too much hassle to roll out in high quantities.
  • Null666666 - Friday, August 9, 2019 - link

    Wondering when 4-8 socket ice lake is due.

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