Samsung and TSMC Roadmaps: 8 and 6 nm Added, Looking at 22ULP and 12FFC
by Anton Shilov on May 5, 2017 9:30 AM ESTNot Everyone Needs Leading Edge: TSMC’s 22 nm ULP, 12 nm FFC and 12 nm FFC+
Now let’s discuss something less advanced, but what is required for hundreds of millions of devices sold every year.
| Advertised PPA Improvements of TSMC's Low-Power/Compact Nodes Data announced by TSMC during conference calls, press briefings and in press releases |
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| CLN28HPC vs CLN28HPM |
CLN28HPC+ vs CLN28HPM |
CLN22LPU vs CLNHPC+ |
CLN16FFC vs CLN16FF |
CLN12FFC vs CLN16FFC |
12FFC-ULP vs CLN12FFC |
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| Power | 20% | 30% | 35% | lower | 25% | lower | ||
| Performance | - | 15% | 15% | unknown | 10% | unknown | ||
| Area Reduction | 10% | 10% | 10% | optional | 20% | unknown | ||
| HVM Start | started | started | 2018 | Q1 2016 | 2018 | 2019 | ||
| Note | Planar 28 nm-based |
FinFET 16/20 nm-based |
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Development of FinFET-based chips is more expensive of ICs featuring planar transistors and their manufacturing is more costly as well. As a result, FinFET is virtually unavailable for many smaller designers of SoCs that usually build various solutions for emerging IoT applications. GlobalFoundries and Samsung offer their FD-SOI manufacturing processes to such companies (and these technologies have a number of other advantages in addition to being more cost-effective), whereas TSMC intends to introduce its new 22 nm ULP technology aimed at such applications. The CLN22ULP is an optimized version of the company’s 28 nm HPC+ (high-performance compact plus) manufacturing process that has been available for a while. The 22ULP offers a 10% area reduction and either a 15% performance improvement over the 28HPC+ process, or a 35% power drop. The 22ULP process joins a family of other ultra-low-power processes offered by TSMC and will compete against GlobalFoundries 22FDX as well as Samsung’s 28 nm FD-SOI offering.
Next up is TSMC’s 12 nm FFC manufacturing technology, which is an optimized version of the company’s CLN16FFC that is set to use 6T libraries (as opposed to 7.5T and 9T libraries) providing a 20% area reduction. Despite noticeably higher transistor density, the CLN12FFC is expected to also offer a 10% frequency improvement at the same power and complexity or a 25% power reduction at the same clock rate and complexity. Further down the road, TSMC also plans to offer a ULP version of the CLN12FFC with reduced voltage, but that is going to happen only in 2018 or 2019.
Sources: Samsung, TSMC, SemiWiki (1, 2, 3).
Related Reading:
- Samsung Foundry Announces 10nm SoC In Mass-Production
- Samsung Announces Second-Gen 14nm Low Power Plus (14LPP) Process Now In Mass Production
- EUV Lithography Makes Good Progress, Still Not Ready for Prime Time
- GlobalFoundries to Expand Capacities, Build a Fab in China
- Intel to Equip Fab 42 for 7 nm
- GlobalFoundries Updates Roadmap: 7 nm in 2H 2018, EUV Sooner Than Later?
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vladx - Friday, May 5, 2017 - link
Yep I'm skeptical about a software development revolution, I think focusing on better computer architectures has a much better outlook.melgross - Saturday, May 6, 2017 - link
Well, there's the question of whether we can get a revolutionary computer architecture these days. It not easy. So we're still looking at cisc vs risc. Maybe we need to go more risc and less cisc. Pretty much everything is some combo of the two.ABR - Sunday, May 7, 2017 - link
No revolution, but technology has been and will continue advancing here for a long time. Higher-level languages and object-oriented programming making larger projects possible. Evolution in UI frameworks and asynchronous programming (cutting edge in mobile frameworks). Hardware virtualization, network definition migrating to software, and environment encapsulation (e.g., Docker), simplifying resource management. Frameworks like OpenGL, EX, Metal bridging the gap between graphics and graphics hardware. Libraries like Caffe and TensorFlow doing the same for neural networks and learning software.Also engineering tools and techniques. Distributed version control systems for source code management. Suites like dpkg or maven for handling dependencies. Team and process practices like the family of Agile techniques.
The sophistication and sheer amount and ubiquity of software applications in our lives today depends just as much on all of these things as on faster, lower power hardware.
boeush - Saturday, May 6, 2017 - link
Once we reach the absolute quantum limits of 2d scaling, we will be looking at alternative materials (graphene, nanotubes, diamond, III-IV chemistry, etc) for better power and frequency scaling. At the same time, 3D stacking of 2D layers by the dozens, then hundreds, then thousands. At the same time, advanced heat dissipation tech (graphene/nanotubes/diamond could serve double duty there), as well as (at least for non-portable devices) refrigeration not just for overclocking but for normal operation. Maybe even look into superconducting chips/interconnects using high-Tc materials, immersed in liquid Nitrogen... There's also research into molecular computing. And, of course, you can always trade off generality against special purpose accelerator ASICs that can provide many-orders-of-magnitude speedup vs conventional processors on same node in specific tasks: and the more compact the node, the more of these various narrow-use circuits you can affordably cram onto a single chip...melgross - Saturday, May 6, 2017 - link
Sure, there are a lot of technologies out there. But most are just impractical, or just too expensive, and complex. We've has liquid cooling for some time, but do most people really want that? What about notebooks? Can't really be done.Other technologies have been considered for a couple of decades but as so expensive that envelope mainframe CPUs can't use them.
Most of these technologies can be used for every high end use, because of expense, effectiveness, and even power draw. But that's just for the top 0.1% of computing. What about the rest of us?
ironargonaut - Monday, May 8, 2017 - link
You mean like when they said that the physics of light would prevent any geometries less then 193nm? Sorry, but the "wall" that was going to end CPU density increases has been broken so many times, that I won't believe it till I see it. Of course just because all those predictions where wrong doesn't mean yours is. Cheers.Gich - Friday, May 5, 2017 - link
Some time ago I dig up this:"14/16nm":
Intel ~13.4nm - from Broadwell to Coffee Lake, Atom x5/x7
Samsung/GFo ~16.6nm - AMD Zen and Rx400/500, nVidia 1050, SD 620/820, Exynos 7/8, Apple A9
TSMC ~18.3nm - nVidia 1060+, Apple A9/10
"10nm":
Intel ~9.5nm - Cannonlake
TSMC ~11.3nm - Helio X30, Kirin 970, Apple A10X
Samsung ~12.0nm - SD835, Exynos 9
Gich - Friday, May 5, 2017 - link
"7nm":Intel ~6.7nm
TSMC/GF ~8.2nm
Samsung ~8.4nm
smalM - Monday, May 8, 2017 - link
TSMC ~18.3nm - that's 16FF which was never used for mass production but is always used by Intel for comparison...helvete - Thursday, July 20, 2017 - link
Intel paper, intel's point of view.