Not Everyone Needs Leading Edge: TSMC’s 22 nm ULP, 12 nm FFC and 12 nm FFC+

Now let’s discuss something less advanced, but what is required for hundreds of millions of devices sold every year.

Advertised PPA Improvements of TSMC's Low-Power/Compact Nodes
Data announced by TSMC during conference calls, press briefings and in press releases
Power 20% 30% 35% lower 25% lower
Performance - 15% 15% unknown 10% unknown
Area Reduction 10% 10% 10% optional 20% unknown
HVM Start started started 2018 Q1 2016 2018 2019
Note Planar
28 nm-based
16/20 nm-based

Development of FinFET-based chips is more expensive of ICs featuring planar transistors and their manufacturing is more costly as well. As a result, FinFET is virtually unavailable for many smaller designers of SoCs that usually build various solutions for emerging IoT applications. GlobalFoundries and Samsung offer their FD-SOI manufacturing processes to such companies (and these technologies have a number of other advantages in addition to being more cost-effective), whereas TSMC intends to introduce its new 22 nm ULP technology aimed at such applications. The CLN22ULP is an optimized version of the company’s 28 nm HPC+ (high-performance compact plus) manufacturing process that has been available for a while. The 22ULP offers a 10% area reduction and either a 15% performance improvement over the 28HPC+ process, or a 35% power drop. The 22ULP process joins a family of other ultra-low-power processes offered by TSMC and will compete against GlobalFoundries 22FDX as well as Samsung’s 28 nm FD-SOI offering.

Next up is TSMC’s 12 nm FFC manufacturing technology, which is an optimized version of the company’s CLN16FFC that is set to use 6T libraries (as opposed to 7.5T and 9T libraries) providing a 20% area reduction. Despite noticeably higher transistor density, the CLN12FFC is expected to also offer a 10% frequency improvement at the same power and complexity or a 25% power reduction at the same clock rate and complexity. Further down the road, TSMC also plans to offer a ULP version of the CLN12FFC with reduced voltage, but that is going to happen only in 2018 or 2019.

Sources: Samsung, TSMC, SemiWiki (123).

Related Reading:

Beyond 10 nm at Samsung: 8 nm and 6 nm


View All Comments

  • Hulk - Friday, May 5, 2017 - link

    Yeah it's called "Assembly." We'll have come full circle. In the beginning it was assembly because processors were so slow. And it appears the end it will also be Assembly as processor power stalls. Kind of fitting. I used to program in Assembly on my Atari 800 back in 1982. Reply
  • vladx - Friday, May 5, 2017 - link

    Not sure if serious, Assembly can work for small to medium projects, but not really big ones. Reply
  • patrickjp93 - Friday, May 5, 2017 - link

    Roller Coaster Tycoon was programmed 100% in assembly, and that is not a medium-sized project. Reply
  • vladx - Friday, May 5, 2017 - link

    Only the first 2 RCT games were wwritten in assembly and both had only 2d graphics so it was mostly game logic which doesn't take much code. So yes, I would call that a mid-sized project. Reply
  • mapesdhs - Saturday, May 6, 2017 - link

    I once wrote an entire word processor in 68K, it worked very well (students ended up using it instead of the Uni-supplied program). People make false assumptions about coding in assembly. Beyond a certain point in complexity, its use becomes more like a high level language, ie. setting parameters and calling procedures & functions. Just the natural way one solves problems in a structured manner brings this about. Assembler doesn't inherantly lend itself to structured programming, but it doesn't have to; it's not hard to use it in a way that makes up for such issues, ie. a long as the design process itself is structured. I found it to be the best of both worlds, getting at the raw metal but also being able to focus on higher level design issues. Easily the most fun project I ever worked on, and the largest printed listing the uni in question had ever received at the time. :D (took 2.5 hours to print out) Reply
  • prisonerX - Sunday, May 7, 2017 - link

    Yeah, Roller Coaster Tycoon was written in 1999, nearly 20 years ago.

    Welcome to the 21st century, you might want to look around, some things have changed.
  • prisonerX - Sunday, May 7, 2017 - link

    Uh, no. A compiler like GCC or LLVM will beat hand coded assembly every time on modern processors, without fail, unless you're talking about tiny or specialized code (say, bootloaders).

    The mistake you're making could be characterised as "premature optimisation" on a grand scale. You think if you tweak every bit of code and write it in assembly you'll get something more efficient. Sorry to break it to you, but you won't. Good structure (this includes choice of data structures and algorithms) is a greater influence on code than tweaking, if you're talking about anything of a reasonable and practical size.
  • Kevin G - Sunday, May 7, 2017 - link

    The general rule of thumb is that hand coded assembly will be used in critical loops to accelerate portions of code that compilers like GCC or LLVM produce.

    You're not wrong about data structures and algorithm choice but in the light of smart decisions there, assembly is the next level of optimization. Assembler can't fix GIGO.
  • amosbatto - Monday, May 21, 2018 - link

    I doubt that assembly will come into vogue, but a whole new generation of compiled languages are appearing which are designed for speed and low resource consumption: Rust, Julia, Swift, Go and NIM. These languages have performance which is slightly slower than C, but without its security problems, so I expect them to be widely used in the future as the hardware stops getting faster. Reply
  • Meteor2 - Friday, May 5, 2017 - link

    More to come from ISA developments, too. Maybe not huge amounts but definitely some -- SVE for example. Reply

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