Xilinx this week introduced a comprehensive HDMI 2.1 IP subsystem for its various cores. The IP subsustem supports resolutions of up to 8K along with other features of the HDMI 2.1 spec, such as high refresh rates and HDR. The subsystem is now ready for licensing by Xilinx chip customers.

Xilinx’s HDMI 2.1 design features the company’s high-speed I/O transceivers that support HDMI 2.1’s data rates (presumably up to 48 Gbps) along with appropriate processing capabilities. The HDMI 2.1 subsystem can be combined with Xilinx’s decoders/encoders for various codecs supporting up to 8K resolutions.

The HDMI 2.1 subsystem enables developers of chips for various applications (including professional AV equipment, cameras, media players, monitors, projectors, KVM, digital signage) to build highly-integrated SoCs that can transmit, receive and process up to 8K video as well as support a “complete” HDMI 2.1 interface. In their turn, such SoCs will replace expensive custom, non-integrated HDMI 2.1 implementations that tend to use multiple chips.

Unfortunately, Xilinx is a bit light on the details on which HDMI 2.1 features its IP core actually supports. The company confirms an 8K (7680×4320) resolution and implies on “higher frame rates and high dynamic range” along with HDMI 2.1 data rates, but does not detail exact numbers. According to HDMI Forum, companies can use HDMI 2.1 branding to designate products that support certain HDMI 2.1 features, but not necessarily all of them. Therefore, it remains to be seen which capabilities Xilinx’s IP core actually supports.

"Today's professional AV and broadcast markets continue to demand higher resolution, higher frame rates and high dynamic range, to deliver more immersive viewing experiences," said Ramesh Iyer, director of marketing, Pro AV and Broadcast market, Xilinx. "Our customers can now implement the complete HDMI 2.1 interface on-chip, creating highly-integrated designs that can natively handle 8K processing. And customers can combine this functionality with 8K lightweight mezzanine codecs for 8K over IP streaming, reducing real-estate, power consumption and BOM costs."

Related Reading:

Source: Xilinx

POST A COMMENT

6 Comments

View All Comments

  • Darkknight512 - Friday, February 08, 2019 - link

    It should be noted that HDMI 2.1 is 12 Gigabit/s per pair and there are four differential pairs used for data. Reply
  • Magnus101 - Sunday, February 10, 2019 - link

    8k?
    Full support for 4k@60Hz@4:4:4@10 bit with HDR is the big plus over the normal 2.1
    Yes, you can't game with current standards with all these settings.
    Enabling 4:4:4 isn't possible at the same time as 10 bit with 4k@60Hz.
    Reply
  • Magnus101 - Sunday, February 10, 2019 - link

    Oh, I meant one of the later versions of Hdmi 2.0a or 2.0b.
    The one that is the current "latest" version in use...
    Reply
  • eligrey - Wednesday, February 13, 2019 - link

    > you can't game with current standards with all these settings

    Huh? I've been gaming at 10-bit 4k 98Hz 4:4:4 HDR for months on the Asus PG27UQ.
    Reply
  • eastcoast_pete - Monday, February 11, 2019 - link

    Any statement or comment by Xilinx about how long the cabling can be and still fulfill HDMI 2.1 requirements? If this only works with cables 10 inches or shorter, it won't be of much use. Reply
  • Kevin G - Monday, February 11, 2019 - link

    Variable refresh rate and eARC are two features that should be able to be retrofitted into existing HDMI 2.0 sink that connect to Xilinix FPGA if they were over-committed in terms of resources. Most designs have gone to hard IP for HDMI 2.0 but it would be nice to see a few designs get some small HDMI 2.1 features added in firmware updates. Reply

Log in

Don't have an account? Sign up now