What’s Next for GlobalFoundries?

In lieu of pursuing a 7nm platform, GlobalFoundries will be embarking on a multifaceted strategy for revenue and profitability. This strategy includes scaling out the 14LPP/12LP platform for various applications that are set to emerge in the 5G era, continuing to evolve the FD-SOI platform, spinning off its ASIC development business, further supporting its existing clients with their 14LPP/12LP products, and some other things.

Scaling Out the 14LPP/12LP

Originally designed for mobile SoCs and some other chips in mind, GlobalFoundries' 14LPP manufacturing technology is used to make CPUs and GPUs at GlobalFoundries. Furthermore, the company has designed two variations of this fabrication process. Whereas the base process used up to 13 metal layers and 9T libraries, 14HP was developed specifically for IBM and tailored for performance at the cost of transistor density, using up to 17 metal layers and 12T libraries. Meanwhile, 12LP — aimed at a broad spectrum of applications, including APUs/CPUs, automotive and other — uses 13 layers and 7.5T libraries, giving a 10% additional performance or power improvement as well as a 15% area reduction vs. the 14LPP.

Going forward, GlobalFoundries plans to offer a broader spectrum of technologies based on its 14 nm node. The move is not truly surprising. Samsung Foundry also offers three versions of its 14 nm processes: 14LPP for high-performance SoCs, 14LPC for compact SoCs, and 14LPU for ultra-low-power chips. So far, GlobalFoundries has confirmed three key markets of its future FinFET process technologies: RF, embedded memory, and low-power. In addition, the company plans to offer its 14LPP/12LP platform with enhanced performance and/or higher transistor density (for cost reduction). To do so, the company will be leveraging the knowledge and techniques they developed as part of the 7LP platform. But naturally Gary Patton does not want to disclose the nature of these innovations or any actual performance targets.

If the company succeeds in the integration of RF capabilities into FinFET-based chips, that will be a world’s first. In theory, such chips would have a notable edge over existing RF solutions, which are made using rather rough process technologies. In addition to regular RF capabilities, GlobalFoundries plans to offer features for mmWave radios. Embedded MRAM will also be another important feature of SoCs made using a FinFET fabrication tech as, again, nobody uses such transistors for embedded memory right now.

At the moment, GlobalFoundries is still forming its new development teams, so we do not know exactly how many projects the company will eventually work on. Meanwhile, keep in mind that any project started today will materialize at best in 2020, with actual products going into HVM in 2021. This will be in time for various devices for high-growth markets, but AMD will naturally wind down its 14LPP/12LP orders to GlobalFoundries over the 2019 – 2020 timeframe, reducing the company’s revenue and profits. Note that at present both the RF and embedded memory technologies for FinFET are in a pathfinding stage, so it is very hard to say when exactly GlobalFoundries comes up with appropriate process technologies.

Investing in FD-SOI

In addition to developing specialized versions of its FinFET-based process technologies, GlobalFoundries will continue to invest in its FDX-branded FD SOI-based platforms, such as 22FDX and 12FDX. Gary Patton did not pre-announce any new versions of the company’s FD-SOI fabrication processes, but clearly indicated that the FDX will remain very important for GlobalFoundries, which is not surprising as GF and Samsung Foundry are the only foundries to offer this tech.

Spinning Off ASICs

Designing chips for a new process technology is always a challenge both from engineering and financial points of view, especially for smaller companies. In a bid to help its customers to develop various SoCs, GlobalFoundries established its ASIC Solutions (ASICs) division, which helps the company’s customers in designing chips. Besides usual things like process development kits (PDKs), various design libraries, silicon-proven memory solutions, interfaces, and other necessary things, ASICs offers support from chip design, methodology, test and packaging teams.

Obviously, GlobalFoundries’ customers going forward will benefit from ASICs IP and teams. However, to ensure that the division continues to attract high-volume work, GlobalFoundries will spin it off and enable it to work with process technologies from other contract makers of semiconductors.

The Fate of EUV Tools

One of the questions we asked GlobalFoundries during a briefing concerning its strategic shift was about the fate of two ASML Twinscan NXE machines installed in Fab 8. At this point the company has not made any decisions, but it intends to consult with ASML and find out what would be the best use of these tools. In theory, GlobalFoundries could keep them to speed up prototyping or even production, but since they require a special treatment, keeping them without using them extensively for HVM may not be a good idea.

Some Thoughts

Until today, GlobalFoundries, Samsung Foundry, and TSMC were the only three remaining contract makers of semiconductors to offer leading-edge process technologies for logic. With GF dropping out from the race, Samsung and TSMC will be the only contract foundries remaining. (While Intel technically has foundry operations, they've had minimal impact on the industry).

For GlobalFoundries, the move has pros and cons. On the one hand the lion’s share of semiconductor industry revenue will be earned from chips made using ’12 nm’ and larger nodes even in 2022, according to Gartner’s findings and cited by GlobalFoundries. Evidently, by not competing for the leading edge, GF will reduce its R&D costs and necessity to build ultra-expensive EUV fabs for 2020 and onwards. Moreover, with specialized technologies sometimes tailored for particular clients, the company will better avoid directly competing against Samsung and TSMC in certain cases. Nonetheless, said foundries are going to compete for emerging devices as well, so they are going to design their own specialized fabrication processes (Samsung in particular will need them for itself). Therefore, GlobalFoundries is not exactly jumping into a blue ocean here.

What remains to be seen is how well GlobalFoundries manages to execute on the timely development of multiple new manufacturing processes and land new customers to fill Fab 8. The company will keep working with AMD for many years to come in fabbing current-generation CPUs and GPUs, and then switching exclusively to wafers with embedded APUs/GPUs as well as with first-gen EPYC dies, as these products have very long lifecycles. However, the number of wafers GlobalFoundries processes for AMD will be dropping rapidly starting from 2019. Whether GF will be able to substitute AMD’s orders with orders from enough smaller players to Fab 8 full utilized is something only time will tell.

While it is sad to see GlobalFoundries leaving the ‘bleeding edge’ field, it is evident that the company’s odds against Samsung and TSMC were not high enough for the owner and the management to take the risks. Therefore, it looks like ‘scaling out’ by offering a set of specialized (and maybe even unique) process technologies instead of ‘scaling up’ and offer another ‘bleeding edge’ node might just be a better bet for GlobalFoundries.

Related Reading:

7LP Canned Due to Strategy Shift GlobalFoundries Press Release
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  • NuclearArmament - Monday, August 27, 2018 - link

    This is stupid, stop trying to milk silicon beyond 11 nm and start using gallium arsenide or indium gallium arsenide. The Fujitsu AP2000 used BiCMOS and GaAs fabrication back in the early 1990s, for crying out loud. Get rid of silicon, it's outdated and needs to be replaced! You have BILLIONS of dollars and get government subsidies, why not take a risk?!
  • rahvin - Monday, August 27, 2018 - link

    The only problem of course is that Gallium based Semi's are about 100X to the cost which is why no one uses them for anything outside certain categories where the cost is justifiable.
  • Khenglish - Monday, August 27, 2018 - link

    iii-v materials can also only result in n-channel HFETs or NPN BJTs. You can't make an active pull-up device, which is required for any VLSI use. Only very high power resistive pull-up or current steering logic is possible.
  • evanh - Monday, August 27, 2018 - link

    Price by itself doesn't explain the why. Price is only an outcome due to lack of volume production. This is true for any mass produced product.

    Khenglish gives a real reason.
  • rahvin - Monday, August 27, 2018 - link

    Price is more than volume production, the materials are far more difficult to obtain, purify combine and handle than silicon and frequently involve highly toxic chemicals. Silicon on the other hand requires an enormous amount of energy but doesn't involve toxic chemical processing. Take a look at the wiki article and the processes to produce GaAs cyrstals, it's not simple. https://en.wikipedia.org/wiki/Gallium_arsenide
  • evanh - Tuesday, August 28, 2018 - link

    None of which makes it expensive.
  • SirPerro - Tuesday, August 28, 2018 - link

    Let me resume Silicon properties from wikipedia...

    - Abundant and cheap

    - Has economies of scales on its side

    - Very stable and can grow to high diameters with good yields

    - Very good thermal conductor for densely packed transistors

    - Its native oxide works very well as insulator with excellent electrical properties

    - Has much higher hole mobility which enables CMOS transistors with much lower power consumption

    - Is a pure element, avoiding the problems of stoichiometric imbalance and thermal unmixing of GaAs

    - It has a nearly perfect lattice, impurity density is very low and allows very small structures to be built

    And Gallium Arsenide drawbacks include...

    - Naturally, GaAs surface cannot withstand the high temperature needed for diffusion

    - GaAs does not have a native oxide, does not easily support a stable adherent insulating layer, and does not possess the dielectric strength or surface passivating qualities of the Si-SiO2

    -Because they lack a fast CMOS structure, GaAs circuits must use logic styles which have much higher power consumption; this has made GaAs logic circuits unable to compete with silicon logic circuits

    - Problems of stoichiometric imbalance and thermal unmixing

    - GaAs has a very high impurity density which makes it difficult to build integrated circuits with small structures, so the 500 nm process is a common process for GaAs

    So you know, usually statements like "This multitrillion dollar industry is wrong, what they do is stupid, they should do X" coming from random dudes on the internet are bullshit.
  • FunBunny2 - Tuesday, August 28, 2018 - link

    "So you know, usually statements like "This multitrillion dollar industry is wrong, what they do is stupid, they should do X" coming from random dudes on the internet are bullshit. "

    yeah but Dear Leader has done that for a lifetime, and look where it got him. :)
  • evanh - Tuesday, August 28, 2018 - link

    My sole argument is economies of scale is what defines the cost.
  • Mikewind Dale - Monday, July 19, 2021 - link

    And your argument is wrong. Economy of scale is one factor that determines cost, but it is not the only factor.

    If economy of scale were the only determinant of cost, then we would expect every product to be produced by a single monopolist, with a single factory. Any time there were two competing factories, they could reduce their costs by building a single factory of twice the size. The result would be that every product on earth would be produced in a single factory, owned by a single company.

    But that's obviously not the case in the real world.

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