For our audience that regularly keeps track of Intel’s product portfolio, it would be hard to miss that the naming strategy of Intel’s process node technologies is a bit of a mess. To some, those words are themselves an understatement, as Intel has shifted its naming strategy 2-3 times since the launch of Intel’s first 10nm products. Not only that, even Intel’s various departments internally have a hard time keeping track of ‘what is this manufacturing process being called today’ when the press like AnandTech ask for details on the latest upcoming products.

Knowing this, and knowing what issues Intel has been having, I wanted to demystify Intel’s manufacturing process naming scheme such that users and engineers alike, even if they are inside Intel, can understand what is what but also importantly why. The why is the crucial factor.

If you're looking for a handy decoder ring for Intel's 10nm Products, it's here in page 3.

Why Do We Have Multiple Versions of a Process?

With Intel’s 14nm, we were invited to 14nm, 14+, 14++, 14+++, and if you believe Intel’s own slides, there were variants that went beyond this ++++ naming scheme. Each one of those additional + points on the end of the name signified a change in the process technology – usually to assist for increasing performance or efficiency.

Each one of these + points is an update to the BKM, or Best Known Methods.

While an engineer can draw an electrical layouts for a part of a processor, such as an addition circuit, actually applying that design to a silicon floorplan for manufacturing is a different skill altogether. Transistor libraries are designed to take advantage of a given process, and when a floorplan is optimized for a process, it can then be pasted and repeated as necessary – on top of this, simulation on thermals, power, and current density are applied to ensure that there are no hotspots or that critical paths inside the design have as few bottlenecks as possible.

When an update to the BKM occurs, two things can happen. Normally we see the update on the level of the transistor library that is changed – if the distance between two fins on a transistor increases for example, the transistor library and the macros may be made bigger, and then the floorplan might be redesigned to take account for this. As for any process node design, there are 100 different controls, and improving one might make three other controls worse, so it is a fine balancing act. Not only this, but the BKM has to be validated at the manufacturing level. The BKM update could apply to the metal stack as well, which in of itself can adjust the performance.


Lots of dials at each stage

In the long long past, BKM updates were never advertised externally. If Intel or TSMC or another foundry discovered a way to improve the performance, or decrease the voltage, or improve the yield, the update was silently rolled into the design and nothing much was made of it. Sometimes processors would be listed as ‘1.0 volts to 1.35 volts’, and it would just be a roll of the dice if a user obtained one of the lower voltage models.

However, as time between different process node updates has elongated, these BKM updates have started to be identified and effectively monetized by the semiconductor companies. An update to a process that improves the voltage by 50 millivolts and increases frequency by 200 MHz immediately becomes a productizable event, and products built on these updates can be offered for more money over the usual. Or, depending on the rate of updates, the whole next generation of products could be built on the update.

So we never saw BKM updates officially announced at Intel’s 45nm, 32nm, or 22nm process nodes. These updates were fast enough that the productization of any update didn’t warrant a full round of marketing. With 14nm, that changed.

Intel had discussed its roadmap beyond 14nm since its 2010 Investor Meeting. It predicted that the company would be on 14nm by 2013, 10nm by 2015, and 7nm by 2017. As we now know, 14nm was two years late, and 10nm was 2-4 years late. Because of the introduction of 10nm being delayed, Intel decided to productize its 14nm BKM updates, and signified those with + points.

Intel’s current official line is that there have been four updates to 14nm, creating five ‘generations’.

More Plus Means More Meme

Because of all the + points, Intel’s marketing sometimes getting it wrong, and perhaps a little bit of ‘++’ in most programming languages meaning ‘+1’, the whole concept of adding + to the process node has become a meme – a meme at Intel’s expense, purely on the basis of its failure to deliver 10nm before the 14++++ naming scheme got out of hand.

10nm Changes Direction, Twice
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  • Teckk - Wednesday, September 30, 2020 - link

    Yes, all fabs at full steam. Funny you forgot about 10nm and 7nm.
    "but it is only until they right the fab ship and they have many ways to do that." like they've been doing it for last 4 SkyLakes? Or was it 5? You're good at counting you will know that for sure.
    Come for a bebate when you actually know something about the process nodes and where they are. Play with historical numbers till then. That's what they are. Historical.
    Reply
  • Tilmitt - Sunday, September 27, 2020 - link

    Is Anandtech aware that Nvidia Corporation has released a new series of 3D accelerator boards? Reply
  • Qasar - Monday, September 28, 2020 - link

    they are, but there are these fires in California....... Reply
  • Sychonut - Monday, September 28, 2020 - link

    Excessive politics + power hungry Murthy = delays Reply
  • deil - Monday, September 28, 2020 - link

    I am not sure how reliable that source is, but I heard Intel could not get double-digit yields on 10nm
    at first, then after making design less "innovative", but yields were okaying, performance was within margin of error from 14nm+++++++++++++
    Reply
  • Spunjji - Monday, September 28, 2020 - link

    Entirely reliable.

    In practice, Ice Lake is roughly comparable to Comet Lake in everything but GPU performance; overall what it gained in IPC it lost in clock speed. This was *after* Intel had already relaxed their 10nm transistor density way below their initial claims of 67-100 million transistors per square millimetre.

    They finally seem to have fixed that with Tiger Lake, but given the paper-launch nature of that release and their reluctance to discuss the 8-core variants, I'd be happy to surmise that either yields are still not great or they only have some fraction of their 10nm fab resources capable of manufacturing on the new "SuperFin" node variant.
    Reply
  • RedOnlyFan - Saturday, October 3, 2020 - link

    @spunjji Your delusional comments deserves a praise. Reply
  • Linustechtips12 - Monday, September 28, 2020 - link

    Look honestly since intel didn't have completion why wouldn't you stay roughly on the same node it saves money and time somewhat you can argue that they should've been innovation but are people forgetting they own stock in amd to Reply
  • Agent Smith - Monday, September 28, 2020 - link

    They're going to drown in those lakes Reply
  • jjjag - Tuesday, September 29, 2020 - link

    Wow the amount of missing the point in the comments has reached epic proportions. AMD will never win. They are a failed company and a failure as a business. They have been around for 50 years and have never amounted to anything more than a side note. They continue to hold on to a failed business model (stealing x86 tech from Intel) with a death grip. As we speak, right now, Apple, Google, Nvidia, and many other companies are developing better, faster, more power efficient mobile CPUs with ARM cores and standard IPs on TSMC 3 and 2nm processes. ARM as a disruption is over. ARM is already wearing the yellow jersey on the road, and we just have a few days left in the race. AMD will be the first to fall, and Intel will be next. Both companies need to make serious strategic changes if they want to exist in 10 years. Reply

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