AMD’s New EPYC 7F52 Reviewed: The F is for ᴴᴵᴳᴴ Frequency

Conclusions

There are three main ways to increase modern computing performance: more cores, higher frequency, and a better instruction throughput per cycle (IPC).

The one everyone loves, but is the hardest to do, is to increase IPC – most modern processor designs, if they are evolutions of previous designs, try to ensure that IPC increases faster than power consumption, such that for every 1% increase in power, there might be 2% increase in IPC. This helps efficiency, and it helps everyone.

As we’ve seen with some recent consumer processors, IPC is nothing unless you can match the frequency of the previous generation. Increasing frequency should sound easy: just increase the voltage, which gives the unfortunate side effect of heat and decreases the efficiency. There’s also another element at play here, in physical design. The ability to produce a layout of a processor floorplan such that different parts of the CPU are not affecting the frequency is a key tenet to good physical design, and this can help boost maximum frequencies. If you can’t get IPC, then an increase in frequency also helps everyone.

An increase in core count is harder to quantify. More cores only helps users that have workloads that scale across multiple cores, or gives an opportunity for more users to work at once. There also has to be an interconnect to feed those cores, which scales out the power requirements. Cores doesn’t always help everyone, but it can be one of the easier ways to scale out certain types of performance.

With the new 7F range of Rome processors, AMD is hoping to stag that first second rung of the ladder. These new parts offer more frequency, but also improve the L3 cache to core ratio, which will certainly help a number of edge cases that are L3 limited or interconnect limited. There is a lot of demand for high frequency hardware, and given the success of the Naples 7371 processor from the previous generation, AMD has expanded its remit into three new 7F processors. The F is for Frequency.

The processor we tested today was the 7F52, the most expensive offering ($3100) which has 16 cores with a base frequency of 3.5 GHz and a turbo of 3.9 GHz. This is the highest turbo of any AMD EPYC processor, and this CPU is built such that there is 256 MB of L3 cache, offering the highest core-to-cache ratio of any x86 processor. At a full 16 MB per core, this means that there is less chance for congestion between threads at the L3 level, which is an important consideration for caching workloads that reuse data.

Our tests showed very good single thread performance, and a speedy ramp from idle to high power, suitable for bursty workloads where responsiveness matters. For high throughput performance, we saw some good numbers in our test suite, especially for rendering.

Personally, it’s great when we see companies like AMD expanding their product portfolio into these niche areas. High frequency parts, high cache parts, or custom designs are all par for the course in the enterprise market, depending on the size of the customer (for a custom SKU) or the size of the demand (to make the SKU public). AMD has been doing this for generations, and in the past even created modified Opterons for the Ferrari F1 team to do more computational fluid dynamics within a given maximum FLOPs. I’m hoping AMD lets us in on any of these special projects in the future.

Threadripper, Rome, Naples. AMD introducing RGB to CPUs