Section by Andrei Frumusanu

SPEC2017 and SPEC2006 Results (15W)

SPEC2017 and SPEC2006 is a series of standardized tests used to probe the overall performance between different systems, different architectures, different microarchitectures, and setups. The code has to be compiled, and then the results can be submitted to an online database for comparsion. It covers a range of integer and floating point workloads, and can be very optimized for each CPU, so it is important to check how the benchmarks are being compiled and run.

We run the tests in a harness built through Windows Subsystem for Linux, developed by our own Andrei Frumusanu. WSL has some odd quirks, with one test not running due to a WSL fixed stack size, but for like-for-like testing is good enough. SPEC2006 is deprecated in favor of 2017, but remains an interesting comparison point in our data. Because our scores aren’t official submissions, as per SPEC guidelines we have to declare them as internal estimates from our part.

For compilers, we use LLVM both for C/C++ and Fortan tests, and for Fortran we’re using the Flang compiler. The rationale of using LLVM over GCC is better cross-platform comparisons to platforms that have only have LLVM support and future articles where we’ll investigate this aspect more. We’re not considering closed-sourced compilers such as MSVC or ICC.

clang version 8.0.0-svn350067-1~exp1+0~20181226174230.701~1.gbp6019f2 (trunk)
clang version 7.0.1 (ssh://

-Ofast -fomit-frame-pointer
-mfma -mavx -mavx2

Our compiler flags are straightforward, with basic –Ofast and relevant ISA switches to allow for AVX2 instructions. Despite ICL supporting AVX-512, we have not currently implemented it, as it requires a much greater level of finesse with instruction packing. The best AVX-512 software uses hand-crafted intrinsics to provide the instructions, as per our 3PDM AVX-512 test later in the review.

For these comparisons, we will be picking out CPUs from across our dataset to provide context. Some of these might be higher power processors, it should be noted.


SPECint2006 Speed Estimated Scores

Amongst SPECint2006, the one benchmark that really stands out beyond all the rest is the 473.astar. Here the new Sunny Cove core is showcasing some exceptional IPC gains, nearly doubling the performance over the 8550U even though it’s clocked 100MHz lower. The benchmark is extremely branch misprediction sensitive, and the only conclusion we can get to rationalise this increase is that the new branch predictors on Sunny Cove are doing an outstanding job and represent a massive improvement over Skylake.

456.hmmer and 464.h264ref are very execution bound and have the highest actual instructions per clock metrics in this suite. Here it’s very possible that Sunny Cove’s vastly increased out-of-order window is able to extract a lot more ILP out of the program and thus gain significant increases in IPC. It’s impressive that the 3.9GHz core here manages to match and outpace the 9900K’s 5GHz Skylake core.

Other benchmarks here which are limited by other µarch characteristics have various increases depending on the workload. Sunny Cove doubled L2 cache should certainly help with workloads like 403.gcc and others. However because we’re also memory latency limited on this platform the increases aren’t quite as large as we’d expect from a desktop variant of ICL.

SPECfp2006(C/C++) Speed Estimated Scores

In SPECfp2006, Sunny Cove’s wider out-of-order window can again be seen in tests such as 453.povray as the core is posting some impressive gains over the 8550U at similar clocks. 470.lbm is also instruction window as well as data store heavy – the core’s doubled store bandwidth here certainly helps it.

SPEC2006 Speed Estimated Total

Overall in SPEC2006, the new i7-1065G7 beats a similarly clocked i7-8550U by a hefty 29% in the int suite and 34% in the fp suite. Of course this performance gap will be a lot smaller against 9th gen mobile H-parts at higher clocks, but these are also higher TDP products.

The 1065G7 comes quite close to the fastest desktop parts, however it’s likely it’ll need a desktop memory subsystem in order to catch up in total peak absolute performance.

SPEC2006 Speed Estimated Performance Per GHz

Performance per clock increases on the new Sunny Cove architecture are outstandingly good. IPC increases against the mobile Skylake are 33 and 38% in the integer and fp suites, though we also have to keep in d mind these figures go beyond just the Sunny Cove architecture and also include improvements through the new LPDDR4X memory controllers.

Against a 9900K, although apples and oranges, we’re seeing 13% and 14% IPC increases. These figures likely would be higher on an eventual desktop Sunny Cove part.


SPECint2017 Rate-1 Estimated Scores

SPECfp2017 Rate-1 Estimated Scores

SPEC2017 Rate-1 Estimated Total

The SPEC2017 results look similar to the 2006 ones. Against the 8550U, we’re seeing grand performance uplifts, just shy of the best desktop processors.

SPEC2017 Speed Estimated Performance Per GHz

Here the IPC increase also look extremely solid. In the SPECin2017 suite the Ice Lake part achieves a 14% increase over the 9900K, however we also see a very impressive 21% increase in the fp suite.

Overall in the 2017 suite, we’re seeing a 19% increase in IPC over the 9900K, which roughly matches Intel’s advertised metric of 18% IPC increase.

Security Updates, Improved Instruction Performance and AVX-512 Updates Power Results (15W and 25W)


View All Comments

  • andrewaggb - Thursday, August 1, 2019 - link

    I'm glad you did the benchmarks. At this point everybody knows intel has manufacturing problems and that availability will be extremely limited for these parts. It's nice to know they have updated designs in a working state and that even with limited clock speeds they're pretty fast. I'm disappointed intel isn't simultaneously releasing these parts on 10nm and 14++++ but hopefully that's because they are more confident about their future roadmap. Reply
  • eastcoast_pete - Thursday, August 1, 2019 - link

    I think they ran out of space to fit any more "++++" after the 14 nm. Reply
  • StormyParis - Thursday, August 1, 2019 - link

    Don't they have cross-licensing with MS, allowing them to use '#' for 3+ '+' ? Reply
  • - Friday, August 2, 2019 - link

    Tell me why i need to prepare months in advance? It's great you get a paper launch product in hand. But to me it's still a paper launch. What's different here from you just releasing the benchmarks on availability day? If i was in the mood for a new cpu/mobo purchase i would start saving up and buy whatever is best on the day. Agree with brakdoo! Reply
  • Kvaern1 - Saturday, August 3, 2019 - link

    Blink if someone is forcing you to read AT articles and you need help. Reply
  • close - Tuesday, August 6, 2019 - link

    @Kvaern1, your point that people should not criticize. So you can either applaud or move along? If nobody ever calls you out for anything then when do you learn? Pointing out something like a paper launch coming from a manufacturer with a history of deception is no without merit.

    Now whether this applies to this article is a different matter. But your low quality sarcasm response and the "only open for praise" attitude shows some troubling mediocrity.
  • eva02langley - Friday, August 2, 2019 - link

    Ian, those companies do things like that for a reason. IMHO, they want to make the public believe that 10nm is a reality, when in fact it is still a fairy tale. Intel knows that the frequency drop, the yield and the price doesn't worth the trouble to switch to 10nm. Sure, they told investors that 10nm exist and they are releasing products to claim this, but in reality, 10nm will be just there so Intel doesn't need to admit to investor that 10nm is a fiasco. If they did, the price of the stock will lose significant value and it would affect the public perception of the company.

    This is what I can take from this whole thing.
  • Klimax - Friday, August 2, 2019 - link

    Is sky blue in your world or is it some version of red? You may have had point a year or two back... Reply
  • 0ldman79 - Friday, August 2, 2019 - link


    They reworked the entire 10nm process to get it going.

    This isn't impossible, it is expensive and time consuming.

    They've spent the $$$ and at least a year working on it.

    It is hardly unheard of that the single most successful tech company on the planet figured out a problem.
  • close - Tuesday, August 6, 2019 - link

    @0ldman79 "the single most successful tech company" - that's the overstatement of the millennium. And of course I'm no stranger to overstatements. Reply

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