Micron this week broke ground on its new fab in Singapore that will be dedicated to manufacturing 3D NAND flash memory. Set to be completed late next year, Micron is not disclosing the production capacity of the new plant, only saying that its investments in the project are going to total billions of U.S. dollars. In addition, the company is disclosing its plans to expand its R&D activities in Singapore.

Update 4/15: Adding extra information provided by Micron about the Fab 10 expansion.

Micron already operates two 300-mm 3D NAND facilities in Singapore called Fab 10N and Fab 10X, which were built earlier this decade. These plants currently produce the lion’s share of Micron’s NAND flash memory.The new semiconductor production facility represents the third phase of Micron’s Fab 10 expansion and will be located adjacent to the existing complexes. The new plant will be built on a 165,000 m2 land plot at North Coast Drive. Just to put the number in context, the Fab 10N (the first module of the manufacturing complex) was built on a 200,000 m2 land plot, its cleanroom space was over 24,000 m2. Micron does not specify the size of the cleanroom space in the new facility for competitive reasons.

One of the things that Micron stresses is that the expansion of the fab does not necessarily mean that it will produce more wafers. The evolution of 3D NAND is a very complex process, but in a nutshell, to grow bit density, producers of flash need to increase the number of layers. As the number of layers grows, each wafer has to spend more time inside chemical vapor deposition (CVD) machines, then it takes longer to etch them and then various extravagant manufacturing techniques like string stacking lengthen manufacturing cycle even further. In a bid to maintain the number of wafers processed as then number of 3D NAND layers grows, flash memory producers have to add extra CVD and etching machines to cleanrooms, which requires extra space. Therefore, while fab expansions may not increase the number of wafer starts per month, they do enable growth in terms of produced NAND flash bits.

The first phase of the new facility is expected to be completed by the summer of 2019, Micron plans to get the first wafers from the new fab sometimes in Q4 2019. The ramp up of the facility is going to take several quarters, so expect significant volumes of 3D NAND memory to come out of the new fab towards the end of calendar 2020.

A slide from Micron's 2015 presentation

The manufacturer does not specify what kind of 3D NAND it plans to make at its new facility in Singapore, but given the timeframes involved, the timing is just about right for Micron to start production of their post-64 layer NAND.

A satellite view of the Micron Semiconductor Asia location from Google Maps.

Sanjay Mehrotra, CEO of Micron, says that in addition to building a new fab, the company will also expand its R&D operations in Singapore. Among other, Micron will hire material scientists, electrical engineers, data scientists, and so on.

Micron does not disclose production capacity of the new phase of the Fab 10, but says that the new plant will require it to hire additional personnel to work at the fab and in the supply chain. At present, Micron’s headcount in Singapore is 7,500 people. The new plant and expansion of the R&D operations in the country will require Micron to hire an additional 1,000 of people.

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Sources: ChannelNewsAsia, BusinessTimes

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  • fazalmajid - Friday, April 6, 2018 - link

    Strange to be building a fab in such a land-starved place.
  • iter - Friday, April 6, 2018 - link

    But consider the benefit - it is in a seismically active area, so they will have plenty of excuses to fake low supply and jack prices up, rather than having to come up with flimsy ones line "we ran out of nitrogen".
  • Retycint - Friday, April 6, 2018 - link

    Singapore is definitely not seismically active

    Source: Live in Singapore
  • iter - Saturday, April 7, 2018 - link

    Oh yeah, absolutely, surrounded from all sides by active fault lines and underwater volcanoes. A.k.a the Pacific Ring of Fire.

    Granted that Singapore is not on the edge of the underlying plate, so strong earthquakes are fairly rare, but it is still on one of the most seismically active plates, which is also rather small, so earthquake waves reach it routinely. Not something that may threaten infrastructure and lives, but chip making is immensely more delicate.
  • Dizoja86 - Saturday, April 7, 2018 - link

    Iter just came up with the laziest excuse for a conspiracy theory I've seen in ages.
  • Spatty - Tuesday, April 10, 2018 - link

    1 - Taxes.
    2 - Large talent base.
  • jjj - Friday, April 6, 2018 - link

    It's not a new fab, it's an expansion.
    It's mainly aimed at keeping wafer output flat with future nodes and not at capacity expansion.
    It will be built in phases, first phase expected to be completed by summer 2019 with initial wafer output in Q4.

    They are also building out incremental cleanroom space in Hiroshima for DRAM and that should be available for production in early 2019. This one would be to enable the transition to 1y.
  • Spatty - Friday, April 6, 2018 - link

    It's basically a new fab at the same site as another. New buildings, new cleanroom space. It's not like theres an exiting building and new tools are going into it. There is no room to just add on to the existing fab space. There is more owned property where it will be built.

    What is wrong in this article is that this will be the 4th fab/expansion (whatever people want to call it) in Singapore. Former Tech Singapore Fab 7, now Micron Fab10W is a few miles away from Fab 10N/X/Y
  • Bob-o - Saturday, April 7, 2018 - link

    The important question is - will more wafers be processed through the combinef space. I believe the answer is no, same wafer count. They need more cleanroom bevause new processes takes longer, and new machinery takes more space. Correct me if I'm wrong?
  • Spatty - Tuesday, April 10, 2018 - link

    That fab already produces all of Micron/Intel's (Unless Intel Fab68 is running yet?) 3DNAND, so yes this will add to the capacity. I believe the prior expansion already covered the wafer count loss from 2D->3D transition.

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