TDP and Power Draw: No Real Surprises

The nature of reporting processor power consumption has become, in part, a dystopian nightmare. Historically the peak power consumption of a processor, as purchased, is given by its Thermal Design Power (TDP, or PL1). For many markets, such as embedded processors, that value of TDP still signifies the peak power consumption. For the processors we test at AnandTech, either desktop, notebook, or enterprise, this is not always the case.

Modern high performance processors implement a feature called Turbo. This allows, usually for a limited time, a processor to go beyond its rated frequency. Exactly how far the processor goes depends on a few factors, such as the Turbo Power Limit (PL2), whether the peak frequency is hard coded, the thermals, and the power delivery. Turbo can sometimes be very aggressive, allowing power values 2.5x above the rated TDP.

AMD and Intel have different definitions for TDP, but are broadly speaking applied the same. The difference comes to turbo modes, turbo limits, turbo budgets, and how the processors manage that power balance. These topics are 10000-12000 word articles in their own right, and we’ve got a few articles worth reading on the topic.

In simple terms, processor manufacturers only ever guarantee two values which are tied together - when all cores are running at base frequency, the processor should be running at or below the TDP rating. All turbo modes and power modes above that are not covered by warranty.

For AMD’s new Ryzen 5000 processors, most of them have a 105 W TDP, with a Package Power Tracking (PPT) setting of 142 W. For these processors, we can see our peak power consumption through our testing matching that value. For the sole 65 W processor, the PPT value is 88 W, and we’re seeing only 76 W, showing some of the efficiencies on the Ryzen 5 5600X.

If we look directly at the Ryzen 9 5950X for chip wide power consumption over per-core loading, we get this following graph. Here we are reporting two of the values that we have access to on the chip, which the chip estimates as part of its turbo detection and action algorithms: total package power (for the whole chip), and the power solely used by the sum of cores, which includes the L3 cache. The difference between the two covers the IO die as well as any chiplet-to-chiplet communications, PCIe, CPU-to-chipset, and DRAM controller consumption.

There are two significant features of this graph.

First is the hump, and a slow decrease in total package power consumption after 8-10 core loading. We saw this when we first tested the previous generation 3950X, and is indicative of how the processor has increased current density as it loads up the cores, and as a result there’s a balance between the frequency it can give, delivering the power, and applying the voltage in a consistent way. We’re seeing the difference between the two values also increasing slightly, as more data is transferred over those off-chiplet communications. We see this effect on the 5900X as well, perhaps indicating this is a feature of the dual chiplet design – we’re not seeing it on the 5800X or 5600X.

The second feature is an odd dip in power moving from 4 to 5 cores loaded. Looking into the data, the frequency of the active cores drops from 4725 to 4675, which isn’t a big drop, however the voltage decreases from 1.38 V to 1.31 V, which seems to be more sizeable drop than other voltage readouts as we scale the core-to-core loading. There’s also a bigger increase in non-core power, up from 16 W to 21 W, which perhaps decreases the power to the cores, reducing the voltage.

This might be an odd quirk of our specific chip, our power test, or it might be motherboard or BIOS specific (or a combination of several factors). We might go back in future on other boards to see if this is consistent.

When we dive into per-core power loading, we get the following:

The big chip’s power distribution seems to go up in that 3-4 core loading before coming back down again. But as we load up the second chiplet moving from 8 to 9 core loading, it is worth noting that the second chipset is reporting lower core power, despite showing the same core frequency. AMD is able to supply the two chiplets different amounts of voltage and power, and we might be seeing this play out in real time.

Perhaps very important is that single core power consumption when we are at 5050 MHz of 20.6 W. Going back to our previous generation data, on Zen 2 we were only seeing a peak of 18.3 W, and a slightly higher voltage reported (1.45 V for Zen 2 vs 1.42 V for Zen 3). This means that from the perspective of our two chips, Zen 3 cores scale better in frequency, and even though the power increases as expected, the voltage simultaneously decreases (Note that there can be some silicon variability to also account for some of this.)

Moving down the stack, the 12-core Ryzen 9 5900X doesn’t show any surprises – we’re seeing the same drop off as we load up the cores, this time as we go beyond eight cores. As this processor uses two chiplets, each with six cores, that second set of six cores seem to be consuming lower power per core as we add in additional load.

Some users might be scratching their heads – why is the second chiplet in both of these chips using less power, and therefore being more efficient? Wouldn’t it be better to use that chiplet as the first chiplet for lower power consumption at low loads? I suspect the answer here is nuanced – this first chipet likely has cores that enable a higher leakage profile, and then could arguably hit the higher frequencies at the expense of the power.

Moving down to a single chiplet but will the full power budget, and there is some power savings by not having the communications of a second chiplet. However, at 8-core load, the 5800X is showing 4450 MHz: the Ryzen 9 processors are showing 4475 MHz and 4500 MHz, indicating that there is still some product differentiation going on with this sort of performance. With this chip we still saw 140 W peak power consumption, however it wasn’t on this benchmark (our peak numbers can come from a number of benchmarks we monitor, not just our power-loading benchmark set).

At the 65 W level of the 5600X, as mentioned before, the all-core frequency is 4450 MHz, which is actually 50 MHz behind the 5800X. However this chip is very consistent, still giving up +50 MHz on its peak turbo compared to the on-box number. It also carries this turbo through to at least 3 core loading, and doesn’t lose much to 5 core loading. Users looking for something low power and consistent could be swayed by this chip.

For some specific real-world tests, we’re going to focus solely on the Ryzen 9 5950X. First up is our image-model construction workload, using our Agisoft Photoscan benchmark. This test has a number of different areas that involve single thread, multi-thread, or memory limited algorithms.

Most of this test sits around the 130 W mark, as the workload has a variable thread count. There are a couple of momentary spikes above 140 W, however everything is well within expected parameters.

The second test is from y-Cruncher, which is our AVX2/AVX512 workload. This also has some memory requirements, which can lead to periodic cycling with systems that have lower memory bandwidth per core options.

Our y-Cruncher test often shows one of two patterns – either a flat line for power-limited processors, or this zig-zag as the test is loaded and also uses a good portion of memory transfers for the calculation. Usually it is the latter which showcases when we’re getting the most out of the processor, and we get this here.

Compared to other processors, for peak power, we report the highest loaded value observed from any of our benchmark tests.

(0-0) Peak Power

Due to AMD’s PPT implementation, we’re getting very consistent peak power results between multiple generations of AMD processors. Because OEMs play around with Intel’s turbo implementation, essentially to an unlimited peak turbo power, this is why we see full-loaded values well above 200 W. While Intel stays on its most optimized 14nm process and AMD leverages TSMC’s leading 7nm, along with multiple generations of DTCO, AMD will have that efficiency lead.

Frequency: Going Above 5.0 GHz SPEC2006 and SPEC2017 Single-Threaded Results
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  • TheinsanegamerN - Tuesday, November 10, 2020 - link

    There is no x590 chipset coming. X570 is ryzen 5000s chipset.

    There's also this miracle fo technology, if you have a micro atx or full atx board, you can put in ADD IN CARDS. Amazing, right? So even if your board does not natively support 2.5G LAN you can add it for a low price, because 2.5G cards are relatively cheap.
  • TheinsanegamerN - Tuesday, November 10, 2020 - link

    the x570 aorus master and msi x570 unify also have 2.5G lan. And surely there will be newer models next year with newer features and names, gotta keep the model churn going!
  • alhopper - Sunday, November 8, 2020 - link

    Ian and Andrei - 1,000 Thank Yous for this awesome article and you fine technical journalism. You guys did amazing work and we (the community) are fortunate to be the benefactors.
    Thanks again and keep up the Good Work (TM).
  • Rekaputra - Sunday, November 8, 2020 - link

    Wow this article it so comprehensive. Glad i always check anandtech for my reference in computing. I wonder how it stack againt threadripper on database or excel compute workload. I know these are desktop proc. But there is possibility use it for mini workstation for office stuff like accounting and development RDBMS as it is cheaper.
  • SkyBill40 - Sunday, November 8, 2020 - link

    Once some availability comes back into play... my old and trusty FX 8350 is going to be retired. I've been waiting to rebuild for a long time now and the wait has clearly paid off regardless of how the is the end of the line for AM4 or well Ryzen 4 does next year. I could wait... but nah.
  • jcromano - Friday, November 13, 2020 - link

    I'm in a similar boat. I'm still running an i5-2500k from early 2011 (coming up on ten years, yikes), and I'll build a new rig, probably 5600X, when the processors become available. I fret a bit over whether I should wait for the next socket to arrive before taking the plunge, but given the infrequency with which I upgrade, I think it's likely that the next socket would also be obsolete by the time it mattered.
  • evilpaul666 - Sunday, November 8, 2020 - link

    I'd love to see some PS3 emulation testing added.
  • abufrejoval - Monday, November 9, 2020 - link

    Control flow integrity (or enforcement) seem to be in, and that was for me a major criterion for getting one (5800X scheduled to arrive tomorrow).

    But what about SEV or per-VM-encryption? From the hints I see this seems enabled in Intel's Tiger Lake and I guess the hardware would be there on all Zen 3 chiplets, but is AMD going to enable it for "consumer" platforms?

    With 8 or more cores around, there is plenty of reasons why people would want to run a couple of VMs on pretty much anything, from a notebook to a home entertainment/control system, even a gaming rig. And some of those VMs we'd rather have secure from phishing and trojans, right?

    Keeping this an EPIC-only or Pro-only feature would be a real mistake IMHO.

    BTW ordered ECC DDR4-3200 to go with it, because this box will run 24x7 and pushes a Xeon E3-1276 v3 into cold backup.
  • lmcd - Monday, November 9, 2020 - link

    Starting to feel like the platform is way too constrained just for the sake of all 6 APUs AMD has released (all with mediocre graphics and most with mediocre CPUs, no less). I hope AMD bifuricates and comes up with an in-between platform that supports ~32-40 CPU PCIe lanes and drops APUs. If APUs can't be on-time with everything else there's so little point.
  • 29a - Monday, November 9, 2020 - link

    "Firstly, because we need an AI benchmark, and a bad one is still better than not having one at all."

    Can't say I agree with that.

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