Benchmark Analysis: Boost Behavior

Let’s dig into some of the testing to see how the systems responded during the benchmarks. We re-ran several of the tests while simultaneously monitoring the processor frequency, temperature, and power. Unfortunately for our comparison, the power polling results provided by our monitoring tools don’t seem to monitor the same power draw. The Intel power numbers are for the SoC package, but the AMD power numbers appear to be just the CPU cores, which is an unfortunate byproduct of testing two different platforms.

PCMark 10

PCMark 10 is a benchmark platform that attempts to simulate real-world tasks by running a variety of workflow, and the results were perhaps the most interesting of any of the benchmarks. There is a major discrepancy in how the AMD CPU behaved compared to the Intel. The Ice Lake platform kept the CPU frequency at a minimum of 3.5 GHz, with bursts to 3.9 GHz when under load. The Picasso processor was very aggressively switching from low frequency to high frequency, and was rarely indicating that it was over 3.0 GHz, but clearly demonstrating its higher peak frequency of 4.0 GHz in several locations. Both systems were fairly even in terms of CPU temperature, and Intel’s aggressive turbo levels were evident with peak power levels of 40 Watts for brief moments. The Ice Lake platform finished the benchmark about 200 seconds quicker than the Picasso system.

Cinebench R20 Single-Thread

We see somewhat similar results when only a single CPU core is loaded with the Picasso CPU frequency varying quite a bit. There’s also an average higher temperature on the AMD platform during this workload, and once again Ice Lake finishes the rendering quite a bit sooner thanks to its stronger CPU cores.

Cinebench R20 Multi-Thread

With all cores loaded the graph is considerably altered. Here the AMD processor is able to maintain a much higher frequency across its cores for much longer, while Intel's chip is only able to maintain 3.5 GHz for about 30 seconds before it runs out of headroom, dropping the cores down to around 2.6 GHz. But despite the lower frequency, the much higher IPC on Sunny Cove allows the Ice Lake platform to finish quite a bit sooner.

GPU Performance - Vega vs Iris Platform Power
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  • TheinsanegamerN - Friday, December 13, 2019 - link

    It isnt just speed, the intel chip uses LPDDR4X. That's an entirely different beat from LPDDR4, let alone normal DDR4.

    AMD would need to redesign their memory controller, and they have just...not done it. The writing was on the wall, and I have no idea why AMD didnt put LPDDR4X compatibility in their chips, hell I dont know why intel waited so long. The sheer voltage difference makes a huge impact in the mobile space.

    You are correct, pushing those speeds at normal DDR4 voltage levels would have tanked battery life.
  • ikjadoon - Friday, December 13, 2019 - link

    Sigh, it is just speed. DDR4-2400 to DDR4-3200 is simply speed: there is no "entirely new controller" needed. The Zen+ desktop counterpart is rated between DDR4-2666 to 2933.

    LPDDR4X is almost identical to LPDDR4: "LPDDR4X is identical to LPDDR4 except additional power is saved by reducing the I/O voltage (Vddq) to 0.6 V from 1.1 V." Whoever confused you that LPDDR4X is "an entirely different beat" from LPDDR4 is talking out of their ass and I caution you to believe anything else they ever say.

    And, no: DDR4-3200 vs DDR4-2400 would've tanked battery life, but simply made it somewhat worse. DDR4-3200 can still run on the stock 1.2V that SO-DIMM DDR4 relies on, but it's pricier and you'd still pay the MHz power penalty.

    I don't think RAM speed/voltage has ever "tanked" a laptop's battery life: shaking my head here...
  • mczak - Friday, December 13, 2019 - link

    I'm quite sure you're wrong here. The problem isn't the memory itself (as long as you get default 1.2V modules, which exist up to ddr4-3200 itself), but the cpu. Zen(+) cpus require higher SoC voltage for higher memory speeds (memory frequency is tied to the on-die interconnect frequency). And as far as I know, this makes quite a sizeable difference - not enough to really matter on the desktop, but enough to matter on mobile. (Although I thought Zen+ could use default SoC voltage up to ddr4-2666, but I could be wrong on that.)
  • Byte - Friday, December 13, 2019 - link

    Ryzen had huge problems with memory speed and even compatibility at launch. No doubt they had to play it safe on laptops. They should have it mostly sorted out with Zen 2 laptop, it is why the notebooks are a gen behind where as intel notebook are usually a gen ahead.
  • ikjadoon - Saturday, December 14, 2019 - link

    We both agree it would be bad for battery life and a clear AMD failure. But, the details...more errors:

    1. Zen+ is rated up to DDR4-2933. 3200 is a short jump. Even then, AMD couldn't even rate this custom SKU to 2666 (the bare minimum of Zen+). AMD put zero work into this custom SKU (whose only saving grace is graphics and even that was neutered). It's obviously a low-volume part (relative to what AMD sells otherwise) or such a high-profile design win.

    2. If AMD can't rate (= bin) *any* of its mobile SoC batches to support even 2666MHz at normal voltages, I'd be shocked.

    For any random Zen+ silicon, sure, it'd need more voltage. The whole impetus for my comments are that AMD created an entire SKU for Microsoft and seemed to take it out of oven half-baked.

    Or, perhaps they had binned the GPU side too much that very few of those CU 11 units could've survived a second binning on the memory controller.
  • azazel1024 - Monday, December 16, 2019 - link

    So all that being said, yes it had a huge impact. GPU based workloads are heavily memory speed dependent. Going from 2400 to 3200MHz likely would have seen a 10-25% increase in the various GPU benchmarks (on the lower end for those that are a bit more CPU biased). That changes AMD from being slightly better overall in GPU performance to a commanding lead.

    On the CPU side of things, many of the Intel wins were on workloads with a lot of memory performance needed. Going from 2400 to 3200 would probably have only resulted in the AMD chip moving up 3-5% in many workloads (20-40% in the more memory subsystem dependent SPEC INT tests), but that would have still evened the playing field a lot more.

    Going to 3766 like the Intel chip would have just been even more of the same.

    Zen 2 and much higher memory bandwidth can't come soon enough for AMD.
  • Zoolook - Saturday, December 21, 2019 - link

    It's not about binning, they couldn't support that memory and keep within their desired TDP because they would have to run infinity fabric at a higher speed.
    They could have used faster memory and lower CPU and/or GPU speed but this is the compromise they settled on.
  • Dragonstongue - Friday, December 13, 2019 - link

    AMD make/design for a client what that client wants, in this case, MSFT as "well known" for making sure to get (hopefully pay much for) what they want, for only reasons that they can understand.

    this case, AMD really cannot say "we are not doing that" as this would mean loss of likely into the millions (or more) vs just saying "not a problem, what would you like?"

    MSFT is very well known for catering to INTC and NVDA whims (they have, still do, even if it cost everyone many things)

    still they AMD and MSFT should have "made sure" to not hold back it's potential performance by using "min spec" memory speed, instead choosing the highest speed they know (through testing) it will support.

    I imagine AMD (or others) could have chosen to use LP memory selection as I call BS on others saying AMD would have no choice but to rearchitecture their design to use the LP over standard power memory, seeing as the LP is likely very little changes need to be done (if any compared to ground up for an entirely different memory type)

    they should have "upped" to the next speed levels however instead of 2400 baseline, 2666, 2933, 3000, 3200 as power draw difference is "negligible" with proper tuning (which MSFT likely would have made sure to do...but then again is MSFT whom pull stupid as heck all the time, so long it keeps their "buddies happy" who care about the consumers themselves)
  • mikeztm - Friday, December 13, 2019 - link

    LPDDR4/LPDDR4X is not related to DDR4.
    It's a upgraded LPDDR3 which is also not related to DDR3.

    LPDDR family is just like GDDR family and are total different type of DRAM standard.
    They almost draw 0 watt when not in use. And in active ram access they do not draw less power significantly compare to DDR4.

    LPDDR4 was first shipped with iPhone 6s in 2015 and it takes Intel 4 years to finally catch up.
    BTW this article has a intentional typo: LPDDR4 3733 on Intel is actually quad channel because each channel is half width 32bit instead of DDR4 64bit.
  • Dragonstongue - Friday, December 13, 2019 - link

    AMD make/design for a client what that client wants, in this case, MSFT as "well known" for making sure to get (hopefully pay much for) what they want, for only reasons that they can understand.

    this case, AMD really cannot say "we are not doing that" as this would mean loss of likely into the millions (or more) vs just saying "not a problem, what would you like?"

    MSFT is very well known for catering to INTC and NVDA whims (they have, still do, even if it cost everyone many things)

    still they AMD and MSFT should have "made sure" to not hold back it's potential performance by using "min spec" memory speed, instead choosing the highest speed they know (through testing) it will support.

    I imagine AMD (or others) could have chosen to use LP memory selection as I call BS on others saying AMD would have no choice but to rearchitecture their design to use the LP over standard power memory, seeing as the LP is likely very little changes need to be done (if any compared to ground up for an entirely different memory type)

    they should have "upped" to the next speed levels however instead of 2400 baseline, 2666, 2933, 3000, 3200 as power draw difference is "negligible" with proper tuning )

    IMO

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