Read our review of EPYC Rome here!

05:05PM EDT - I'm here at the San Francisco Palace of Fine Arts for what may very well be AMD's most important event of the year: the 2nd generation EPYC "Rome" launch

05:06PM EDT - The second – and arguably largest – shoe in the Zen 2 launch is dropping today: AMD’s EPYC 7002-series “Rome” processor. Based on all the things that made 3rd gen Ryzen great just a month ago, now AMD is doing it bigger and better. With up to 64 cores, AMD will be striking right at the heart of Intel’s server CPU business; and they just might be able to do it.

05:07PM EDT - AMD CEO Lisa Su is on the stage, and we're already getting started

05:09PM EDT - AMD intends to focus on all the major pillars of data centers. Everything from performance and TCO to the very timely subject of security

05:09PM EDT - It's not about just the chip or just the processor. It's about how you put all of it together

05:10PM EDT - "You can't get it all done in one generation"

05:10PM EDT - AMD is tackling the datacenter as a system approach

05:10PM EDT - "We completely believe in an open ecosystem"

05:11PM EDT - Lisa is quickly recapping the history of AMD's Zen server lineup

05:11PM EDT - AMD's Naples came out 2 years ago. It was ambitious

05:12PM EDT - Though speaking as a member of the press, AMD's 1st gen was largely a spearhead part; something to get AMD's name out there and get ecosystem partners hardware to try out

05:12PM EDT - 2nd gen EPYC, Rome, is where it all really kicks off

05:13PM EDT - One of the requirements for AMD to "win" will be to win over the hyperscalers - the biggest of the biggest server buyers

05:14PM EDT - With so much taking place in the cloud, winning over these massive customers is key to flipping the larger market

05:14PM EDT - How will AMD do it? With better performance and a lower total cost of ownership

05:16PM EDT - (The blue lighting in the background isn't a camera anomaly; AMD is using a lot of blue lighting here. I may have worn the wrong color shirt)

05:16PM EDT - As exciting as EPYC 1 was, AMD is even more excited about 2nd gen EPYC

05:17PM EDT - AMD had to bet big on Zen 2. And that bet is the biggest in the server realm

05:17PM EDT - ILisa just pointed out that today is also the 7th. I had missed that until now)

05:18PM EDT - Lisa is proclaiming that the 2nd gen EPYC is the highest performing x86 processor in the world

05:19PM EDT - AMD says they've set 80 world records. And we'll see many of them over the next 90 minutes

05:20PM EDT - AMD believes that if you are doing anything in a datacenter, you should be doing it with EPYC

05:21PM EDT - AMD has the most cores ever. The most I/O ever

05:24PM EDT - AMD wants to beat the industry standard curve on performance

05:24PM EDT - Calling out Intel's Cascade Lake by name

05:25PM EDT - AMD is almost double Intel's performance. "And that's what we call changing the game"

05:26PM EDT - AMD is doing a top-to-top comparison. EPYC 7742 to Xeon Platinun 8280L

05:26PM EDT - 97% high perf with the peak (not base) SPECint rate

05:27PM EDT - And 4x the floating point perf of EPYC 1

05:31PM EDT - Once again reiterating the point of more performance at a lower cost

05:31PM EDT - And ultimately, a 25-50% lower tCO

05:32PM EDT - But AMD can't do it alone. It's their OEM/ODM partners who take their parts and make a whole system out of it

05:34PM EDT - Now on stage: Mark Potter of HPE

05:35PM EDT - HPE has 3 servers available today

05:36PM EDT - And 12 servers by this time next year

05:38PM EDT - On a side note, AMD and its partners know the score. Intel's Cascade Lake parts are already out. So AMD knows exactly where they're going to land and what they'll face for most of the next year. And as a result, there is no one here quite as happy as the AMD employees

05:40PM EDT - HPE has also been focusing on security at all levels, because systems are getting attacked and successfully hacked on all levels

05:41PM EDT - This means HPE needed to secure the base system

05:43PM EDT - HPE's full line of EPYC servers will be supported by their Infosight self-management system

05:44PM EDT - HPE is making the hardware through their hardware channels as well as their service channels

05:45PM EDT - Lisa's second guest: Jen Fraser of Twitter

05:46PM EDT - Lisa says she;s a huge fan of Twitter. It's definitely true:

05:50PM EDT - Now turning things over to Mark Papermaster to talk about the tech details of Rome

05:51PM EDT - AMD has rolled out Zen 2 as planned. And they believe it'll be the same for Zen 3 in the future

05:52PM EDT - Mark is recapping the big bets AMD took for Zen 2, due to the long lead time on development

05:54PM EDT - 7nm was not easy. It took a collaberation between AMD, the fabs, and design software makers to make it all work

05:55PM EDT - Server customers need as much perf as they can get within the power envelope that server racks allow

05:56PM EDT - So AMD designed their chips around that. Use the density improvement to add more cores, and to make them better

05:58PM EDT - Some workloads have achieved up to a 40% perf gain at 32 cores with the same frequencies

05:59PM EDT - It's intense engineering that delivered these performance gains

05:59PM EDT - 2x Op cache, 3rd AGU, 2x AVX width, 2x L3, etc

06:01PM EDT - 2x cores + 2x AVX = 4x the peak FP perf per socket

06:02PM EDT - And using the Infinity Fabric to tie together the chiplets and the discrete CPUs

06:03PM EDT - 7nm CPU dies + 14nm I/O die

06:05PM EDT - 8 CPU dies coming to a single I/O die

06:05PM EDT - 8 memory channels 128 PCIe lanes

06:08PM EDT - 128 lanes of PCIe bandwidth means a lot of bandwidth to feed accelerators as well

06:09PM EDT - Socket to memory latency has been improved as well

06:09PM EDT - Mark is threatening to go on forever. I think most of the crowd would be for it

06:10PM EDT - But he'll stop here, so that another partner can come on stage

06:10PM EDT - Now on stage: Robert Hormuth of Dell

06:12PM EDT - Robert is covering all the ways that AMD's new hardware speeds up customer workloads

06:14PM EDT - Dell will be expanding its AMD server portfolio this fall

06:15PM EDT - Now shifting gears to the subject of security

06:16PM EDT - "Our designs have been rather resilient"

06:16PM EDT - And Zen 2 has been hardened further

06:17PM EDT - Also focusing on new tech like a secure root of trust, Secure Memory Encryption, and Secure Encrypted Virtualization (2)

06:18PM EDT - SEV2 offers 509 unique keys, up from 15 on SEV1 /EPYC

06:18PM EDT - Now on stage: Krish Prasad of VMWare

06:22PM EDT - AMD and VMware have been close partners, and with virtualization + hyperscaling continuing to expand, VMware will be a key partner for growing their server market share over the coming years

06:23PM EDT - VMware will be supporting SEV

06:24PM EDT - Back to Mark, who is wrapping up his section talking about momentum

06:25PM EDT - AMD is supplying the industry with more processing power with every generation

06:25PM EDT - Zen 3 is design complete

06:26PM EDT - And Zen 4 is in design

06:26PM EDT - AMD is committed. It's personal, and they will not give up

06:27PM EDT - Now on stage, Forrest Norrod to talk about systens and the EPYC ecosystem

06:28PM EDT - 32 billion transistors

06:29PM EDT - AMD is offering high perf single-socket and dual-socket parts

06:30PM EDT - "Over half a gigabyte of cache for crying out loud"

06:30PM EDT - AMD has a lot more cache than Intel, and they are clearly intent to beat Intel over the head with it

06:32PM EDT - AMD is quite proud of their 80 world records

06:36PM EDT - AMD has a bunch of demo stations here where they will be showing off the performance of Rome

06:36PM EDT - They say that they're going to be leading in a lot of workloads

06:36PM EDT - Now on stage: Peter Ungaro of Cray

06:37PM EDT - AMD and Cray, for those unaware, won one of the US government's exascale supercomputing contracts. The Frontier supercomputer

06:39PM EDT - Frontier isn't just about CPUs, but it's a combination of AMD CPUs and GPUs. Tied together with Cray's new inter-node fabric, Slingshot

06:43PM EDT - Cray and AMD have also just won a contract with the US Airforce for their weather department

06:44PM EDT - Now on stage: Matt Link of Indiana University, who will be the first educational institution to get a Cray Shasta system

06:45PM EDT - Big Red 200, a Shasta with EPYC processors

06:46PM EDT - IU will be focusing on researching health, the environment, and machine learning

06:48PM EDT - AMD says that their high performance completely changes the economics of the virtualized datacenter

06:49PM EDT - AMD isn't holding back on any features for their 1P processors. They're including all the memory, all the I/O, and all the security features

06:51PM EDT - Forrest doesn't mince words. AMD believes you can do anything you can do in a dual socket Xeon config in a single socket 2nd gen EPYC config

06:52PM EDT - Performance is the key for getting AMD in the door. But it's TCO that's going to carry them to winning over big datacenter customers

06:53PM EDT - Now on stage: Doug Fisher of Lenovo

06:54PM EDT - Lenovo of course is a major server vendor as well, and a close AMD partner

06:55PM EDT - Lenovo's systems are designed from the ground up for Rome, meaning they aren't using boards originally meant for Naples

06:56PM EDT - This is important, because Rome boards are required to support PCIe 4 and the higher memory clockspeeds

06:59PM EDT - Now rolling a customer video

07:03PM EDT - Now on stage: Girish Bablani from Microsoft's Azure division

07:03PM EDT - Side note: the review embargo has expired. See our full EPYC Rome review here:

07:04PM EDT - The extra bandwidth of EPYC helps Microsoft with the performance of some of their workloads, such as fluid dynamics simulations

07:06PM EDT - 3 Azure announcements

07:07PM EDT - 1) HBv2 systems, with Rome and HDR InfiniBand

07:07PM EDT - 2) And EPYC VDI as well

07:08PM EDT - 3) And general purpose systems based on Rome: Da_v3 and Ea_v3

07:09PM EDT - Forrest is thanking all the partners for getting things ready for today's Rome launch

07:10PM EDT - Now looking at the EPYC part stack

07:10PM EDT - The only thing differentiating the parts is performance - how many cores, at what clockspeed, and whether it supports 2 sockets or not

07:13PM EDT - AMD is offering just a *bit* more performance than Intel for the money,,,

07:14PM EDT - (Forrest Norrod: 1 2. Startled Journalists: 0)

07:14PM EDT - And now Lisa is back on the stage

07:15PM EDT - "We really do believe that every single datacenter environment should use EPYC"

07:15PM EDT - Now on stage: Bart Sano of Google

07:16PM EDT - "Google runs datacenters around the world"; and AMD wants in them

07:19PM EDT - Google has already deployed 2nd gen EPYC systems within their datacenters

07:20PM EDT - "Google was the first to deploy Rome in a production datacenter environment"

07:21PM EDT - Google will also be making Rome available via the Google Cloud Engine

07:22PM EDT - Depending on just how many systems Google eventually orders, this could be just the kind of big win that AMD needs to start to carve out a piece of the x86 server market

07:23PM EDT - AMD is just getting started

07:25PM EDT - AMD is committed to delivering further performance features and new, innovative features

07:25PM EDT - Milan is design complete, and Genoa will come after that

07:25PM EDT - Suffice it to say, AMD is being very bullish here

07:26PM EDT - And, as you can now see in our full review, they have good reason to be

07:26PM EDT - That's a wrap. Off to demos.

Read our review of EPYC Rome here!



View All Comments

  • valinor89 - Wednesday, August 07, 2019 - link

    Remember, the rules are:
    - Every time Lisa says the word "excited" you take a shot.
  • Ryan Smith - Wednesday, August 07, 2019 - link

    Please don't kill your fellow AT readers! Reply
  • FireSnake - Wednesday, August 07, 2019 - link

    Epyc is destroying Xeon processors. Reply
  • Elstar - Wednesday, August 07, 2019 - link

    I doubt they’ll cover this, but what does The NUMA setup look like to the OS? Does Rome scale to 4P? Reply
  • looncraz - Wednesday, August 07, 2019 - link

    It's configurable, default is one NUMA node per socket. Reply
  • darkswordsman17 - Wednesday, August 07, 2019 - link

    From what AMD has said, to the OS it looks like unified CPU, with the I/O die handling everything that would've caused NUMA issues previously. I am going to assume it doesn't. I think they'd need a new socket to scale beyond 2. I think its going to be one of the ways they'll tout scaling in the future, as they're not going to be able to keep doubling up the number of cores by cramming more in to each die. Also if they start releasing hybrid processing units (i.e. chips with CPU and GPU dice - not for graphics but for AI and machine learning), I think they'd want to be able to up the number of sockets they can support. Reply
  • Kevin G - Wednesday, August 07, 2019 - link

    Each socket as four external Infinity Fabric links on Epyc. This was required for four die parts in the first generation. Now that all the coherency is handled via a single IO die, all four external links woudn't be necessary to minimize latencies between NUMA domains.

    Kind of odd but a triple socket system would likely hit the latency and bandwidth balance with the available topologies. This would provide up to 192 cores, 198 PCIe lanes and up to 12 TB of memory.

    A quad socket would not be optimal for a gamut of workloads due to the intersocket bandwidth restrictions. Latencies would be good though. Standard fare of 256 cores, 264 PCIe lanes and 16 TB of RAM.

    An 8 socket system would have to abandon the concept of each socket directly connected to each other and in an already bandwidth starved scenario, would be suboptimal. Though technically it would be feasible to build now.
  • FreckledTrout - Wednesday, August 07, 2019 - link

    I hope EPYC ends up as good as it looks on paper. AMD needs to get some market share now. while they can. Reply
  • ksec - Wednesday, August 07, 2019 - link

    >AMD and VMware have been close partners

    That is strange, but also nice to know. Considering Patrick Gelsinger once said he *hate* AMD in one of his IDF, at least the bad blood didn't carry over from his Intel's day to VMware.
  • deltaFx2 - Wednesday, August 07, 2019 - link

    It's hardly personal. His job at VMWare is to make money for the company and shareholders. If AMD is the way to do it, he'll happily collaborate. His job at Intel was to make money for intel. And it must've been pretty tough for him during the Opteron era. Reply

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