The Intel Optane Memory H10 Review: QLC and Optane In One SSD
by Billy Tallis on April 22, 2019 11:50 AM ESTRandom Read Performance
Our first test of random read performance uses very short bursts of operations issued one at a time with no queuing. The drives are given enough idle time between bursts to yield an overall duty cycle of 20%, so thermal throttling is impossible. Each burst consists of a total of 32MB of 4kB random reads, from a 16GB span of the disk. The total data read is 1GB.
The burst random read test easily fits within the Optane cache on the Optane Memory H10, so it outperforms all of the flash-based SSDs, but is substantially slower than the pure Optane storage devices.
Our sustained random read performance is similar to the random read test from our 2015 test suite: queue depths from 1 to 32 are tested, and the average performance and power efficiency across QD1, QD2 and QD4 are reported as the primary scores. Each queue depth is tested for one minute or 32GB of data transferred, whichever is shorter. After each queue depth is tested, the drive is given up to one minute to cool off so that the higher queue depths are unlikely to be affected by accumulated heat build-up. The individual read operations are again 4kB, and cover a 64GB span of the drive.
On the longer random read test that covers a wider span of the disk than the Optane cache can manage, the H10's performance is on par with the TLC-based SSDs.
 |
|||||||||
The Optane cache provides little benefit over pure QLC storage at lower queue depths, but at the higher queue depths the H10 with caching enabled starts to develop a real lead over the QLC portion on its own. Unfortunately, but the time queue depths are this high, the flash-based SSDs have all surpassed the H10's random read throughput.
Random Write Performance
Our test of random write burst performance is structured similarly to the random read burst test, but each burst is only 4MB and the total test length is 128MB. The 4kB random write operations are distributed over a 16GB span of the drive, and the operations are issued one at a time with no queuing.
The burst random write performance of the H10 with caching enabled is better than either half of the drive can manage on its own, but far less than the sum of its parts. A good SLC write cache on a TLC drive is still better than the Optane caching on top of QLC.
As with the sustained random read test, our sustained 4kB random write test runs for up to one minute or 32GB per queue depth, covering a 64GB span of the drive and giving the drive up to 1 minute of idle time between queue depths to allow for write caches to be flushed and for the drive to cool down.
On the longer random write test that covers a much wider span than the Optane cache can handle, the Optane Memory H10 falls behind all of the flash-based competition. The caching software ends up creating more work that drags performance down far below what the QLC portion can manage with just its SLC cache.
 |
|||||||||
Random write performance on the Optane Memory H10 is unsteady but generally trending downward as the test progresses. Two layers of caching getting in each others way is not a good recipe for consistent sustained performance.
Facebook
Twitter
RSS
60 Comments
View All Comments
Valantar - Tuesday, April 23, 2019 - link
"Why hamper it with a slower bus?": cost. This is a low-end product, not a high-end one. The 970 EVO can at best be called "midrange" (though it keeps up with the high end for performance in a lot of cases). Intel doesn't yet have a monolithic controller that can work with both NAND and Optane, so this is (as the review clearly states) two devices on one PCB. The use case is making a cheap but fast OEM drive, where caching to the Optane part _can_ result in noticeable performance increases for everyday consumer workloads, but is unlikely to matter in any kind of stress test. The problem is that adding Optane drives up prices, meaning that this doesn't compete against QLC drives (which it would beat in terms of user experience) but also TLC drives which would likely be faster in all but the most cache-friendly, bursty workloads.I see this kind of concept as the "killer app" for Optane outside of datacenters and high-end workstations, but this implementation is nonsense due to the lack of a suitable controller. If the drive had a single controller with an x4 interface, replaced the DRAM buffer with a sizeable Optane cache, and came in QLC-like capacities, it would be _amazing_. Great capacity, great low-QD speeds (for anything cached), great price. As it stands, it's ... meh.
cb88 - Friday, May 17, 2019 - link
Therein lies the BS... Optane cannot compete as a low end product as it is too expensive.. so they should have settled for being the best premium product with 4x PCIe... probably even maxing out PCIe 4.0 easily once it launches.CheapSushi - Wednesday, April 24, 2019 - link
I think you're mixing up why it would be faster. The lanes are the easier part. It's inherently faster. But you can't magically make x2 PCIe lanes push more bandwidth than x4 PCIe lanes on the same standard (3.0 for example).twotwotwo - Monday, April 22, 2019 - link
Prices not announced, so they can still make it cheaper.Seems like a tricky situation unless it's priced way below anything that performs similarly though. Faster options on one side and really cheap drives that are plenty for mainstream use on the other.
CaedenV - Monday, April 22, 2019 - link
lol cheaper? All of the parts of a traditional SSD, *plus* all of the added R&D, parts, and software for the Optane half of the drive?I will be impressed if this is only 2x the price of a Sammy... and still slower.
DanNeely - Monday, April 22, 2019 - link
Ultimately, to scale this I think Intel is going to have to add an on card PCIe switch. With the company currently dominating the market setting prices to fleece enterprise customers, I suspect that means they'll need to design something in house. PCIe4 will help some, but normal drives will get faster too.kpb321 - Monday, April 22, 2019 - link
I don't think that would end up working out well. As the article mentions PCI-E switches tend to be power hungry which wouldn't work well and would add yet another part to the drive and push the BOM up even higher. For this to work you'd need to deliver TLC level performance or better but at a lower cost. Ultimately the only way I can see that working would be moving to a single integrated controller. From a cost perspective eliminating the DRAM buffer by using a combination of the Optane memory and HBM should probably work. This would probably push it into a largely or completely hardware managed solution and would improve compatibility and eliminate the issues with the PCI-E bifrication and bottlenecks.ksec - Monday, April 22, 2019 - link
Yes, I think we will need a Single Controller to see its true potential and if it has a market fit.Cause right now I am not seeing any real benefits or advantage of using this compared to decent M.2 SSD.
Kevin G - Monday, April 22, 2019 - link
What Intel needs to do for this to really take off is to have a combo NAND + Optane controller capable of handling both types natively. This would eliminate the need for a PCIe switch and free up board space on the small M.2 sticks. A win-win scenario if Intel puts forward the development investment.e1jones - Monday, April 22, 2019 - link
A solution for something in search of a problem. And, typical Intel, clearly incompatible with a lot of modern systems, much less older systems. Why do they keep trying to limit the usability of Optane!?In a world where each half was actually accessible, it might be useful for ZFS/NAS apps, where the Optane could be the log or cache and the QLC could be a WORM storage tier.