SPEC CPU2006 Cont: Per-Core Performance w/SMT

Moving beyond single-threaded performance, multi-threaded performance within the confines of a single core is of course also important. The Vulcan CPU architecture was designed from the start to leverage SMT4 to keep its cores occupied and boost their overall throughput, so this is where we'll look next.

SPEC CPU2006: Single Core w/SMT
Subtest
SPEC CPU2006
Integer
Application Type Cavium
ThunderX
2 GHz
gcc 5.2
1 thread
Cavium
ThunderX2
@2.5 GHz
gcc 7.2
4 threads
Xeon
8176
@3.8 GHz
gcc 7.2
2 threads
Thunder
X2
vs
Xeon 8176
Thunder
X2
vs
ThunderX
400.perlbench Spam filter 8.3 24.1 50.6 48% 290%
401.bzip2 Compression 6.5 22.9 31.9 72% 350%
403.gcc Compiling 10.8 35 38.1 92% 330%
429.mcf Vehicle scheduling 10.2 52.4 50.6 104% 510%
445.gobmk Game AI 9.2 25.1 35.6 71% 270%
456.hmmer Protein seq. analyses 4.8 26.7 41 65% 560%
458.sjeng Chess 8.8 22.4 37.1 60% 250%
462.libquantum Quantum sim 5.8 83.6 83.2 100% 1440%
464.h264ref Video encoding 11.9 34 66.8 51% 290%
471.omnetpp Network sim 7.3 31.1 41.1 76% 440%
473.astar Pathfinding 7.9 27.2 33.8 80% 340%
483.xalancbmk XML processing 8.4 33.8 75.3 45% 400%

First of all, the ThunderX2 core is a massive improvement over the simple ThunderX core. Even excluding libquantum – that benchmark could easily run 3 times faster on the older ThunderX core after some optimization and compiler improvements – the new ThunderX2 is no less than 3.7 times faster than its older brother. This kind of an IPC advantage makes the original ThunderX's 50% core advantage all but irrelevant.

Looking at the impact of SMT, on average, we see that 4-way SMT improves the ThunderX2's performance by 32%. This ranges from 8% for video encoding to 74% for pathfinding. Intel meanwhile gets a 18% boost from their 2-way SMT, ranging from 4% to 37% in the same respective scenarios.

Overall, a boost of 32% for the ThunderX2 is decent. But it does invite an obvious comparison: how does it fare relative to another SMT4 architecture? Looking at IBM's POWER8, which also supports SMT4, at first glance there seems to be some room for improvement, as the POWER8 sees a 76% boost in the same scenario.

However this isn't entirely an apples-to-apples comparison, as the IBM chip had a much wider back-end: it could issue 10 instructions while the ThunderX2 core is limited to 6 instructions per cycle. The POWER8 core was also much more power hungry: it could fit only 10 of those ultra-wide cores inside a 190W power budget on a 22 nm process. In other words, further increasing the performance gains from using SMT4 would likely require even wider cores, and in turn seriously impact the total number of cores available inside the ThunderX2. Still, it is interesting to put that 32% number into perspective.

Single-Threaded Integer Performance: SPEC CPU2006 Java Performance
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  • Eris_Floralia - Wednesday, May 23, 2018 - link

    The L2$ for SKX should be 1MB (256+768KiB), 16-way.
  • Ryan Smith - Wednesday, May 23, 2018 - link

    Right you are. Thanks!
  • danjme - Wednesday, May 23, 2018 - link

    Mental.
  • Duncan Macdonald - Wednesday, May 23, 2018 - link

    The CPU may be much cheaper than the equivalent Intel CPU - however on the price of a complete server there would be almost no difference as the vast majority of the price of a server is in other items (RAM, storage, network, software etc). To take a significant share, the performance needs to be better than Intel CPUs on both a per thread and a per socket basis. Potential users will look at this CPU - see that it is not faster than Intel on a per thread basis and is also not X86-64 compatible and turn away with a shrug. A price difference of under 5% for a complete server is not enough to justify the risks of going from x86-64 to ARM.
  • BurntMyBacon - Thursday, May 24, 2018 - link

    Perhaps you are correct and the lack of per thread performance will not allow Cavium to take a "significant' share of the market from Intel. However, at this point, getting even a small amount of market penetration in the server market is a significant achievement for an ARM vendor. This processor doesn't need to take a "significant" share from Intel to be successful. It just needs to establish a solid foothold. Given the data, I think it has a good chance of succeeding in that.

    The bigger question in my mind is how Intel will respond. They already have the ability to make a many lite core accelerator as demonstrated by the Xeon Phi line. Will they bring this tech to their CPU lineup, create a new accelerator based on this tech to handle applications that use many light threads, create a new many small core CPU based on Goldmont Plus (or Tremont), or will they consider the ARM threat insignificant enough to ignore.
  • boeush - Wednesday, May 23, 2018 - link

    "(*) EPYC and Xeon E5 V4 are older results, run on Kernel 4.8 and a slightly older Java 1.8.0_131 instead of 1.8.0_161. Though we expect that the results would be very similar on kernel 4.13 and Java 1.8.0_161"

    What about Spectre/Meltdown mitigation patches? Were they in effect for 'older' results?
  • boeush - Wednesday, May 23, 2018 - link

    To elaborate: if those numbers really are from July 2017, then they don't reflect true performance in a server context any longer (servers are where Spectre/Meltdown patches would be applied most.). Since the performance impact of Spectre/Meltdown is greatest on speculative execution and memory loads/prefetching, I'd guess those super-aggressive memory subsystem performance numbers, as well as single thread IPC advantages that Intel's CPUs claim in your benchmarks, are not really entirely applicable any longer.
  • HStewart - Wednesday, May 23, 2018 - link

    Spectre has been proved to effect other CPU's than Intel and even effects ARM and AMD.,

    Image on this article states that this CPU supports Fully Out of Order execution. So with my understanding of Spectre that this CPU also has issues.

    To be honest I not sure how much the whole Spectre/Meltdown stuff is in this real world. It probably cause more harm in the computer industry than help.
  • Manch - Thursday, May 24, 2018 - link

    Commentor: Blah Blah Blah Spectre?
    HStewart: Shill Shill Shill must defend Intel by any means...
  • lmcd - Thursday, May 24, 2018 - link

    Commentor: reasonable position taken
    Manch: *banned for unreasonable, offensive comments*

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