Sizing Up Servers: Intel's Skylake-SP Xeon versus AMD's EPYC 7000 - The Server CPU Battle of the Decade?
by Johan De Gelas & Ian Cutress on July 11, 2017 12:15 PM EST- Posted in
- CPUs
- AMD
- Intel
- Xeon
- Enterprise
- Skylake
- Zen
- Naples
- Skylake-SP
- EPYC
Intel's Optimized Turbo Profiles
Also new to Skylake-SP, Intel has also further enhanced turbo boosting.
There are also some security and virtualization enhancements (MBE, PPK, MPX) , but these are beyond the scope this article as we don't test them.
Summing It All Up: How Skylake-SP and Zen Compare
The table below shows you the differences in a nutshell.
| AMD EPYC 7000 |
Intel Skylake-SP | Intel Broadwell-EP |
|
| Package & Dies | Four dies in one MCM | Monolithic | Monolithic |
| Die size | 4x 195 mm² | 677 mm² | 456 mm² |
| On-Chip Topology | Infinity Fabric (1-Hop Max) |
Mesh | Dual Ring |
| Socket configuration | 1-2S | 1-8S ("Platinum") | 1-2S |
| Interconnect (Max.) Bandwidth (*)(Max.) |
4x16 (64) PCIe lanes 4x 37.9 GB/s |
3x UPI 20 lanes 3x 41.6 GB/s |
2x QPI 20 lanes 2x 38.4 GB/s |
| TDP | 120-180W | 70-205W | 55-145W |
| 8-32 | 4-28 | 4-22 | |
| LLC (max.) | 64MB (8x8 MB) | 38.5 MB | 55 MB |
| Max. Memory | 2 TB | 1.5 TB | 1.5 TB |
| Memory subsystem Fastest sup. DRAM |
8 channels DDR4-2666 |
6 channels DDR4-2666 |
4 channels DDR4-2400 |
| PCIe Per CPU in a 2P |
64 PCIe (available) | 48 PCIe 3.0 | 40 PCIe 3.0 |
(*) total bandwidth (bidirectional)
At a high level, I would argue that Intel has the most advanced multi-core topology, as they're capable of integrating up to 28 cores in a mesh. The mesh topology will allow Intel to add more cores in future generations while scaling consistently in most applications. The last level cache has a decent latency and can accommodate applications with a massive memory footprint. The latency difference between accessing a local L3-cache chunk and one further away is negligible on average, allowing the L3-cache to be a central storage for fast data synchronization between the L2-caches. However, the highest performing Xeons are huge, and thus expensive to manufacture.
AMD's MCM approach is much cheaper to manufacture. Peak memory bandwidth and capacity is quite a bit higher with 4 dies and 2 memory channels per die. However, there is no central last level cache that can perform low latency data coordination between the L2-caches of the different cores (except inside one CCX). The eight 8 MB L3-caches acts like - relatively low latency - spill over caches for the 32 L2-caches on one chip.
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msroadkill612 - Wednesday, July 12, 2017 - link
It looks interesting. Do u have a point?Are you saying they have a place in this epyc debate? using cheaper ddr3 ram on epyc?
yuhong - Friday, July 14, 2017 - link
"We were told from Intel that ‘only 0.5% of the market actually uses those quad ranked and LR DRAMs’, "intelemployee2012 - Wednesday, July 12, 2017 - link
what kind of a forum and website is this? we can't delete the account, cannot edit a comment for fixing typos, cannot edit username, cannot contact an admin if we need to report something. Will never use these websites from now on.Ryan Smith - Wednesday, July 12, 2017 - link
"what kind of a forum and website is this?"The basic kind. It's not meant to be a replacement for forums, but rather a way to comment on the article. Deleting/editing comments is specifically not supported to prevent people from pulling Reddit-style shenanigans. The idea is that you post once, and you post something meaningful.
As for any other issues you may have, you are welcome to contact me directly.
Ranger1065 - Thursday, July 13, 2017 - link
That's a relief :)iwod - Wednesday, July 12, 2017 - link
I cant believe what i just read. While I knew Zen was good for Desktop, i expected the battle to be in Intel's flavour on the Server since Intel has years to tune and work on those workload. But instead, we have a much CHEAPER AMD CPU that perform Better / Same or Slightly worst in several cases, using much LOWER Energy during workload, while using a not as advance 14nm node compared to Intel!And NO words on stability problems from running these test on AMD. This is like Athlon 64 all over again!
pSupaNova - Wednesday, July 12, 2017 - link
Yes it is.But this time much worse for Intel with their manufacturing lead shrinking along with their workforce.
Shankar1962 - Wednesday, July 12, 2017 - link
Competition has spoiled the naming convention Intels 14 === competetions 7 or 10Intel publicly challenged everyone to revisit the metrics and no one responded
Can we discuss the yield density and scaling metrics? Intel used to maintain 2year lead now grew that to 3-4year lead
Because its vertically integrated company it looks like Intel vs rest of the world and yet their revenue profits grow year over year
iwod - Thursday, July 13, 2017 - link
Grew to 3 - 4 years? Intel is shipping 10nm early next year in some laptop segment, TSMC is shipping 7nm Apple SoC in 200M yearly unit quantity starting next September.If anything the gap from 2 - 3 years is now shrink to 1 to 1.5 year.
Shankar1962 - Thursday, July 13, 2017 - link
Yeah 1-1.5 years if we cheat the metrics when comparison2-3years if we look at metrics accurately
A process node shrink is compared by metrics like yield cost scaling density etc
7nm 10nm etc is just a name