Intel's Optimized Turbo Profiles

Also new to Skylake-SP, Intel has also further enhanced turbo boosting.

There are also some security and virtualization enhancements (MBE, PPK, MPX) , but these are beyond the scope this article as we don't test them. 

Summing It All Up: How Skylake-SP and Zen Compare

The table below shows you the differences in a nutshell.

  AMD EPYC 7000
 
Intel Skylake-SP Intel Broadwell-EP
 
Package & Dies Four dies in one MCM Monolithic  Monolithic
Die size 4x 195 mm² 677 mm² 456 mm²
On-Chip Topology Infinity Fabric
(1-Hop Max)
Mesh Dual Ring
Socket configuration 1-2S 1-8S ("Platinum") 1-2S
Interconnect (Max.)
Bandwidth (*)(Max.)
4x16 (64) PCIe lanes
4x 37.9 GB/s
3x UPI 20 lanes
3x 41.6 GB/s
2x QPI 20 lanes
2x 38.4 GB/s
TDP 120-180W 70-205W 55-145W
8-32 4-28 4-22
LLC (max.) 64MB (8x8 MB) 38.5 MB 55 MB
Max. Memory 2 TB 1.5 TB 1.5 TB
Memory subsystem
Fastest sup. DRAM
8 channels
DDR4-2666
6 channels
DDR4-2666
4 channels
DDR4-2400
PCIe Per CPU in a 2P 64 PCIe (available) 48 PCIe 3.0 40 PCIe 3.0

(*) total bandwidth (bidirectional)

At a high level, I would argue that Intel has the most advanced multi-core topology, as they're capable of integrating up to 28 cores in a mesh. The mesh topology will allow Intel to add more cores in future generations while scaling consistently in most applications. The last level cache has a decent latency and can accommodate applications with a massive memory footprint. The latency difference between accessing a local L3-cache chunk and one further away is negligible on average, allowing the L3-cache to be a central storage for fast data synchronization between the L2-caches. However, the highest performing Xeons are huge, and thus expensive to manufacture. 

AMD's MCM approach is much cheaper to manufacture. Peak memory bandwidth and capacity is quite a bit higher with 4 dies and 2 memory channels per die. However, there is no central last level cache that can perform low latency data coordination between the L2-caches of the different cores (except inside one CCX). The eight 8 MB L3-caches acts like - relatively low latency - spill over caches for the 32 L2-caches on one chip.  

Intel's New On-Chip Topology: A Mesh Xeon Skylake-SP SKUs
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  • Shankar1962 - Wednesday, July 12, 2017 - link

    AMD is fooling everyone one by showing more cores, pci lanes, security etc
    Can someone explain me why GOOGLE ATT AWS ALIBABA etc upgraded to sky lake when AMD IS SUPERIOR FOR HALF THE PRICE?
  • Shankar1962 - Wednesday, July 12, 2017 - link

    Sorry its Baidu
    Pretty sure Alibaba will upgrade

    https://www.google.com/amp/s/seekingalpha.com/amp/...
  • PixyMisa - Thursday, July 13, 2017 - link

    Lots of reasons.

    1. Epyc is brand new. You can bet that every major server customer has it in testing, but it could easily be a year before they're ready to deploy.
    2. Functions like ESXi hot migration may not be supported on Epyc yet, and certainly not between Epyc and Intel.
    3. Those companies don't pay the same prices we do. Amazon have customised CPUs for AWS - not a different die, but a particular spec that isn't on Intel's product list.

    There's no trick here. This is what AMD did before, back in 2006.
  • blublub - Tuesday, July 11, 2017 - link

    I kinda miss Infinity Fabric on my Haswell CPU and it seems to only have on die - so why is that missing on Haswell wehen Ryzen is an exact copy?
  • blublub - Tuesday, July 11, 2017 - link

    argh that post did get lost.
  • zappor - Tuesday, July 11, 2017 - link

    4.4.0 kernel?! That's not good for single-die Zen and must be even worse for Epyc!

    AMD's Ryzen Will Really Like A Newer Linux Kernel:
    https://www.phoronix.com/scan.php?page=news_item&a...

    Kernel 4.10 gives Linux support for AMD Ryzen multithreading:
    http://www.pcworld.com/article/3176323/linux/kerne...
  • JohanAnandtech - Friday, July 21, 2017 - link

    We will update to a more updated kernel once the hardware update for 16.04 LTS is available. Should be August according to Ubuntu
  • kwalker - Tuesday, July 11, 2017 - link

    You mention an OpenFOAM benchmark when talking about the new mesh topology but it wasn't included in the article. Any way you could post that? We are trying to evaluate EPYC vs Skylake for CFD applications.
  • JohanAnandtech - Friday, July 21, 2017 - link

    Any suggestion on a good OpenFoam benchmark that is available? Our realworld example is not compatible with the latest OpenFoam versions. Just send me an e-mail, if you can assist.
  • Lolimaster - Tuesday, July 11, 2017 - link

    AMD's lego design where basically every CCX can be used in whatever config they want be either consumer/HEDT or server is superior in the multicore era.

    Cheaper to produce, cheaper to sell, huge profits.

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