Pentium III Execution Power

There's a difference between making a derivative microprocessor architecture and not re-inventing the wheel; we've already established that Banias is significantly different from the Pentium III, but the Israel design team didn't just synthesize the CPU from scratch in order to be genuinely different than the Pentium III.

Much like the Athlon 64 shares the same execution units as the Athlon XP, the Banias has the same execution unit layout as the Pentium III. This means that Banias features no more than 5 execution ports, significantly less than what we're used to seeing from the Pentium 4 for example.

By sticking with a relatively narrow execution layout, Intel continues to limit the power consumption of the Banias core; as our IPC comments from the previous section indicate however, the limited number of execution resources won't hold back performance. What the limited number of execution resources does mean however is that Hyper-Threading will not "work" on Banias.

Remember that Hyper-Threading works based on the idea that there are enough execution units in the Pentium 4 and enough pauses in the pipeline that there are execution units that remain idle during normal operation. With Banias' short pipeline, micro-ops fusion and relatively narrow architecture (read: lack of a large amount of execution units in parallel), Hyper-Threading won't find much use because of the lack of periods of idle execution.

So, no Hyper-Threading, big deal right? It would have been easy to shrug off if it hadn't been for Pat Gelsinger mentioning that "threading" was the future of Intel's microprocessor design efforts at dinner a year ago. By "threading" Pat was referring to being able to execute multiple threads on a single microprocessor, the most familiar way these days being through the use of Hyper-Threading, a technology that dispatches multiple instruction streams from different threads through the same pipeline and down to the same execution units.

We've already discussed why this won't work for Banias, so what will? Although it will be a while before we see this, the idea would be to have a multi-core die, with some sharing of execution units and/or caches in order to keep die size down to a minimal. We won't get too off track with talking about the future of Banias, but for now it's something to keep in the back of your mind for the years to come…

Banias' Architecture (continued) Banias' Caches
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  • zigCorsair - Wednesday, July 14, 2004 - link

    I thought it was a very informative article. Of course, I'll be upset if it's biased, but being a master's student in CS, many of the exact details I was looking for were in here, and for that I say thank you.
  • Zebo - Monday, May 10, 2004 - link

    I don't see whats so impressive. An athlon mobile 2600/2800 xp 35W version, which runs ~2000Mhz will kill these. To little to late.
  • Anonymous User - Wednesday, September 10, 2003 - link

    how the hell could this be a balanced and informative article when in their own analysis they ignored their own data?

    There is no mention of the anamolous nature of the BAPCO test..absolutely NOTHING...

    Its enough for me to question the competency of this site...and even to the point where I suspect that certain unethical compromises have been made.
  • Anonymous User - Wednesday, September 10, 2003 - link

    Yeah, I agree with Sprockkets... same reason Athlon XP loses to the P4 in this benchmark... someone was trying to make the P4 look better, and everything else look worse. Now all the sudden, this new great CPU is getting it's but kicked because of all the P4 optimizations (and probably non-P4 deoptomizations).
  • sprockkets - Tuesday, September 9, 2003 - link

    I wonder why the P4 trashes the PM on Content Creation Performance and nothing else? Maybe it's the stupid skewing toward the P4. Why else would it lose here and kick butt everywhere else? www.theinquirer.net has an article which brought this to readers attention.
  • Anonymous User - Thursday, August 21, 2003 - link

    "Without a trace cache, the design team was forced to develop a more accurate branch predictor unit for the Banias core. Although beyond the scope of this article, Banias was outfitted with a branch predictor significantly superior to what was in the Pentium III. The end result was a reduction of mispredicted branches by around 20%."

    Wouldn't he mean that the branch predictor was superior to the P4?
  • Anonymous User - Tuesday, August 19, 2003 - link

    looks good
  • Anonymous User - Friday, August 8, 2003 - link

    An outstanding well balanced article, after this read I feel I really know about Centrino. Thanks

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