The iPad Pro Preview: Taking Notes With iPad Proby Joshua Ho & Ryan Smith on November 11, 2015 7:00 AM EST
The A9X SoC & More To Come
Finally, as everyone is undoubtedly eagerly anticipating our look at the A9X SoC inside the iPad Pro, let’s take a very quick look at what we know about the SoC so far. There’s a bit of a limit to what we can do blindly via just software, but I’m hoping that the eventual A9X die shots will confirm some of our suspicions on A9X’s configuration.
|Apple SoC Comparison
|PVR 10 cluster Series7?
|PVR SGX554 MP4
|Memory Bus Width
(TSMC 16nm or Samsung 14nm)
|TSMC 16nm &
First and foremost, the most unexpected news here is that unlike A8X, A9X is not packing a triple-core CPU. Instead A9X drops back down to just a pair of Twister CPU cores. The twist here is that relative to A8X and A9, Apple has cranked up their CPU clockspeeds. Way, way up. Whereas the iPad Air 2 (A8X) shipped at 1.5GHz and the iPhone 6s (A9) at 1.85GHz, the A9X sees Apple push their clockspeed to 2.26GHz. Not counting the architectural changes, this is 22% higher clocked than the A9 and 51% higher than the A8X.
The fact that Apple dropped back down to 2 CPU cores is unexpected given that we don’t expect Apple to ever go backwards in such a fashion, and while we’ll never know the official reason for everything Apple does, in retrospect I’m starting to think that A8X was an anomaly and Apple didn’t really want a tri-core CPU in the first place. A8X came at a time where Apple was bound by TSMC’s 20nm process and couldn’t drive up their clockspeeds without vastly increasing power consumption, so a third core was a far more power effective option.
By comparison, with the FinFET process Apple is using here – and given the lower volume of A9X I don’t have reason to believe it’s dual-sourced, so it’s either TSMC or Samsung – Apple has been free to increase their clockspeeds substantially. At the same time these FinFET processes are still new and yields won’t be great, so there is a strong incentive to keep die sizes down to keep yields up, and adding a third core would only make that harder. If I had to guess, Apple only wanted two cores to begin with – this makes it easier for developers knowing that they only have two cores to work with – and that it’s A8X that is the anomaly.
Otherwise a highly clocked CPU is far more in-line with Apple’s design philosophy as it means that A9X is capable of amazing single-threaded performance – and keep in mind that we’re talking ARM Cortex-A57-like clockspeeds for a CPU that gets much more work done per cycle – so what we see here makes a lot of sense. Plus with iPad Pro in particular Apple has more battery capacity to sustain the power draw of a higher clocked SoC, and more surface area to dissipate that heat, so the usual concerns about power and cooling aren’t quite as pressing. I do wonder if this will impact multitasking performance much, but given what Twister is capable of, I’m not nearly ready to write off a dual-core Twister implementation clocked this high.
Moving on, as is customary for the X-series SoCs from Apple, A9X features what I believe to be a wider 128-bit LPDDR4 memory bus. The memory bandwidth numbers clearly point to a wider bus, and Apple needs the bandwidth to feed a more powerful GPU.
|Geekbench 3 Memory Bandwidth Comparison (1 thread)
|Apple A9X 2.26GHz
|Apple A8X 1.5GHz
Which brings us to the last bit of our preview, the GPU. Apple went with a 6 cluster PowerVR Series7 design on A9, and for A9X they have gone with a larger design. Without a die photo it’s basically impossible to determine how many clusters are in use since clockspeed plays such an important role. What we do know is that GPU performance relative to A9 has pretty much doubled, which once again is right in-line with Apple’s usual design goals.
Given what Apple has done with clockspeed on Twister, for the moment I am staking my bet on it being a 10 cluster design with a higher GPU clockspeed than A9 giving us the rest of the performance boost. To be clear here this could also be a 12 cluster design at a similar clockspeed or even an 8 cluster design clocked far higher – we’ll need die shots to confirm – but given all of the options it’s a 10 cluster design that is the best balance between die size and clockspeed, and it would also be the biggest curveball Apple could throw. It should also be noted that PowerVR Series7 certainly supports such a configuration since it’s scalable from 2 to 16 clusters, although in Imagination’s official product catalog they don’t have a name for such a configuration. So for the moment I’m simply calling it a 10 cluster Series7.
Anyhow, we’ll be back later with a full review of the iPad Pro, including the pros and cons of Apple’s first large-format, productivity-oriented tablet, and a full breakdown of the A9X SoC. So until then stay tuned.