History: Where GDDR5 Reaches Its Limits

To really understand HBM we’d have to go all the way back to the first computer memory interfaces, but in the interest of expediency and sanity, we’ll condense that lesson down to the following. The history of computer and memory interfaces is a consistent cycle of moving between wide parallel interfaces and fast serial interfaces. Serial ports and parallel ports, USB 2.0 and USB 3.1 (Type-C), SDRAM and RDRAM, there is a continual process of developing faster interfaces, then developing wider interfaces, and switching back and forth between them as conditions call for.

So far in the race for PC memory, the pendulum has swung far in the direction of serial interfaces. Though 4 generations of GDDR, memory designers have continued to ramp up clockspeeds in order to increase available memory bandwidth, culminating in GDDR5 and its blistering 7Gbps+ per pin data rate. GDDR5 in turn has been with us on the high-end for almost 7 years now, longer than any previous memory technology, and in the process has gone farther and faster than initially planned.

But in the cycle of interfaces, the pendulum has finally reached its apex for serial interfaces when it comes to GDDR5. Back in 2011 at an AMD video card launch I asked then-graphics CTO Eric Demers about what happens after GDDR5, and while he expected GDDR5 to continue on for some time, it was also clear that GDDR5 was approaching its limits. High speed buses bring with them a number of engineering challenges, and while there is still headroom left on the table to do even better, the question arises of whether it’s worth it.

AMD 2011 Technical Forum and Exhibition

The short answer in the minds of the GPU community is no. GDDR5-like memories could be pushed farther, both with existing GDDR5 and theoretical differential I/O based memories (think USB/PCIe buses, but for memory), however doing so would come at the cost of great power consumption. In fact even existing GDDR5 implementations already draw quite a bit of power; thanks to the complicated clocking mechanisms of GDDR5, a lot of memory power is spent merely on distributing and maintaining GDDR5’s high clockspeeds. Any future GDDR5-like technology would only ratchet up the problem, along with introducing new complexities such as a need to add more logic to memory chips, a somewhat painful combination as logic and dense memory are difficult to fab together.

The current GDDR5 power consumption situation is such that by AMD’s estimate 15-20% of Radeon R9 290X’s (250W TDP) power consumption is for memory. This being even after the company went with a wider, slower 512-bit GDDR5 memory bus clocked at 5GHz as to better contain power consumption. So using a further, faster, higher power drain memory standard would only serve to exacerbate that problem.

All the while power consumption for consumer devices has been on a downward slope as consumers (and engineers) have made power consumption an increasingly important issue. The mobile space, with its fixed battery capacity, is of course the prime example, but even in the PC space power consumption for CPUs and GPUs has peaked and since come down some. The trend is towards more energy efficient devices – the idle power consumption of a 2005 high-end GPU would be intolerable in 2015 – and that throws yet another wrench into faster serial memory technologies, as power consumption would be going up exactly at the same time as overall power consumption is expected to come down, and individual devices get lower power limits to work with as a result.

Finally, coupled with all of the above has been issues with scalability. We’ll get into this more when discussing the benefits of HBM, but in a nutshell GDDR5 also ends up taking a lot of space, especially when we’re talking about 384-bit and 512-bit configurations for current high-end video cards. At a time when everything is getting smaller, there is also a need to further miniaturize memory, something that GDDR5 and potential derivatives wouldn’t be well suited to resolve.

The end result is that in the GPU memory space, the pendulum has started to swing back towards parallel memory interfaces. GDDR5 has been taken to the point where going any further would be increasingly inefficient, leading to researchers and engineers looking for a wider next-generation memory interface. This is what has led them to HBM.

AMD Dives Deep On High Bandwidth Memory HBM: Wide & Slow Makes It Fast
Comments Locked


View All Comments

  • jardows2 - Tuesday, May 19, 2015 - link

    The open-air problem is only a problem if there is a new, smaller form factor for the video cards. OEM partners will likely make oversized heatsinks, or use a custom PCB to support more fans, just as they do now. With the reduced power envelope, I imagine the bulk of the OEM's will use the savings to make more compact designs, rather than use the energy savings to make higher performing designs.
  • xenol - Tuesday, May 19, 2015 - link

    I'm a bit skeptical that HBM will dramatically increase the performance the GPU. While it's true that this will help with high resolution rendering, there's also the fact that if the GPU wasn't up to snuff to begin with, it doesn't matter how much memory bandwidth you throw at it. But I'm willing to wait and see when this tech finally shows up at our store shelves before committing to any idea.

    If anything, I'm only led to believe this will just solve memory bandwidth and power consumption issues for a while.
  • testbug00 - Tuesday, May 19, 2015 - link

    It won't on 28nm. Give you higher core clocks in a TPD, yes. HBM currently shows bandwidth scaling to at least 8TB/s from what I can tell... Which, is over 20 times the Titan X currently. Even if they can "only' hit half of that, it should supply more than enough bandwidth until 5nm process at least.

    So, at least 10 years, more likely 15-20.
  • chizow - Tuesday, May 19, 2015 - link

    I agree, it is interesting though regardless, as 2.5D stacked RAM is clearly going to be the future of GPU memory, which will in turn drive different form factors, cooling solutions etc.
  • der - Tuesday, May 19, 2015 - link

    It'll bring a lot!
  • guskline - Tuesday, May 19, 2015 - link

    Great article. Sounds like custom water coolers may be shut out because the OEM cooler will be water cooled and there probably isn't enough improvement going to custom cooling.

    I'm anxious to see the performance of a single 390x Fiji vs my 2 custom cooled R9 290s in CF.
  • CaedenV - Tuesday, May 19, 2015 - link

    This is fantastic. I mean, we cannot build any wider, so it is neat to see them finding ways to build upwards instead.

    I would love to see a next gen device that pairs a card like this with HMC. Super fast mixed-use storage/memory combined with super fast GPU memory would make for a truly amazing combination.

    Also, I don't see the 4GB limit being a big deal for mainstream high-end cards or laptops. It is only the ultra high-end enthusiast cards that might suffer in sales.
  • menting - Tuesday, May 19, 2015 - link

    Just to be clear..HBM and HMC are not the same (but they are fairly similar in a lot of areas)
  • anubis44 - Tuesday, May 19, 2015 - link

    nVidia also simply has fewer good, long-term relationships to exploit than AMD has. The whole semi-conductor industry has been working with AMD for 45 years, whereas nVidia, run by Jen Hsun Huang, a former AMD employee, has only been around for about 15 years.
  • HighTech4US - Tuesday, May 19, 2015 - link

    What drugs are you on today?

Log in

Don't have an account? Sign up now