The Pursuit of Clock Speed

Thus far I have pointed out that a number of resources in Bulldozer have gone down in number compared to their abundance in AMD's Phenom II architecture. Many of these tradeoffs were made in order to keep die size in check while adding new features (e.g. wider front end, larger queues/data structures, new instruction support). Everywhere from the Bulldozer front-end through the execution clusters, AMD's opportunity to increase performance depends on both efficiency and clock speed. Bulldozer has to make better use of its resources than Phenom II as well as run at higher frequencies to outperform its predecessor. As a result, a major target for Bulldozer was to be able to scale to higher clock speeds.

AMD's architects called this pursuit a low gate count per pipeline stage design. By reducing the number of gates per pipeline stage, you reduce the time spent in each stage and can increase the overall frequency of the processor. If this sounds familiar, it's because Intel used similar logic in the creation of the Pentium 4.

Where Bulldozer is different is AMD insists the design didn't aggressively pursue frequency like the P4, but rather aggressively pursued gate count reduction per stage. According to AMD, the former results in power problems while the latter is more manageable.

AMD's target for Bulldozer was a 30% higher frequency than the previous generation architecture. Unfortunately that's a fairly vague statement and I couldn't get AMD to commit to anything more pronounced, but if we look at the top-end Phenom II X6 at 3.3GHz a 30% increase in frequency would put Bulldozer at 4.3GHz.

Unfortunately 4.3GHz isn't what the top-end AMD FX CPU ships at. The best we'll get at launch is 3.6GHz, a meager 9% increase over the outgoing architecture. Turbo Core does get AMD close to those initial frequency targets, however the turbo frequencies are only typically seen for very short periods of time.

As you may remember from the Pentium 4 days, a significantly deeper pipeline can bring with it significant penalties. We have two prior examples of architectures that increased pipeline length over their predecessors: Willamette and Prescott.

Willamette doubled the pipeline length of the P6 and it was due to make up for it by the corresponding increase in clock frequency. If you do less per clock cycle, you need to throw more clock cycles at the problem to have a neutral impact on performance. Although Willamette ran at higher clock speeds than the outgoing P6 architecture, the increase in frequency was gated by process technology. It wasn't until Northwood arrived that Intel could hit the clock speeds required to truly put distance between its newest and older architectures.

Prescott lengthened the pipeline once more, this time quite significantly. Much to our surprise however, thanks to a lot of clever work on the architecture side Intel was able to keep average instructions executed per clock constant while increasing the length of the pipe. This enabled Prescott to hit higher frequencies and deliver more performance at the same time, without starting at an inherent disadvantage. Where Prescott did fall short however was in the power consumption department. Running at extremely high frequencies required very high voltages and as a result, power consumption skyrocketed.

AMD's goal with Bulldozer was to have IPC remain constant compared to its predecessor, while increasing frequency, similar to Prescott. If IPC can remain constant, any frequency increases will translate into performance advantages. AMD attempted to do this through a wider front end, larger data structures within the chip and a wider execution path through each core. In many senses it succeeded, however single threaded performance still took a hit compared to Phenom II:

 

Cinebench 11.5 - Single Threaded

At the same clock speed, Phenom II is almost 7% faster per core than Bulldozer according to our Cinebench results. This takes into account all of the aforementioned IPC improvements. Despite AMD's efforts, IPC went down.

A slight reduction in IPC however is easily made up for by an increase in operating frequency. Unfortunately, it doesn't appear that AMD was able to hit the clock targets it needed for Bulldozer this time around.

We've recently reported on Global Foundries' issues with 32nm yields. I can't help but wonder if the same type of issues that are impacting Llano today are also holding Bulldozer back.

The Architecture Power Management and Real Turbo Core
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  • Shuxclams - Wednesday, October 12, 2011 - link

    Wow... I mean what else do you say? Intel is walking away from the competition, and thats sucks for everyone long term. FAIL
  • ezinner - Wednesday, October 12, 2011 - link

    AMD, please up your game. Stop being just the lower price point and become the leader. We do not need 10 to 20 processors to choose from. Let's have less products and better performance, even if the price is the same or more than Intel. I like that you stick with the socket longer than Intel, but you keep getting beat everytime. AMD needs new people who can drive them further ahead.
  • BlueFlash - Wednesday, October 12, 2011 - link

    New architectures always require software optimization to shine. Will enough Bulldozers sell to convince major software vendors to do that work? Could we get some AMD optimized benchmarks? In any case, I prefer the APU strategy, given my compute needs.
  • Chaser - Wednesday, October 12, 2011 - link

    I invested in AMD last a while back and like many on here thought that BD was going to restore AMD's prominence as the enthusiast's definitive choice once again. Thankfully, especially now, I pulled out my money when it was still safe and also decided to not wait for my next upgrade rig and thankfully (now) I went Z68, I7 2500K and GTX 580.

    Maybe my hopes for AMD CPU wise was a pipe-dream. It just seems that INTEL is so far ahead of them now with their rather aggressive development that AMD is destined to be the bargain basement alternative forever. Regardless of my lack of realism or false hopes I suppose, its still a downer.

  • bji - Wednesday, October 12, 2011 - link

    At a certain point in the not too distant future, the x86 market will be stagnant enough in terms of sales growth (with mobile devices taking larger and larger shares of the computing market) that it will not pay to spend the exponentially increasing R & D dollars to advance x86 state of the art. At that point, AMD will have an opportunity to catch up to Intel - if AMD survives in the x86 market long enough.
  • FunBunny2 - Wednesday, October 12, 2011 - link

    Always remember: no one, that's *no one* not even Intel, runs X86 instruction set in hardware. No one. All these X86 cpus emulate is instruction set through a RISC core. It's only a matter of time until nobody bothers with the emulation.
  • Mishera - Wednesday, October 12, 2011 - link

    Let me try to paint a glass half full picture:

    Amd's CPU division had to have known that the performance of this architecture for years now... So I imagine that this might not be just a "Let's just get something out there" move. So maybe there's some alternative ways of looking at this:

    1. Amd has made it clear that this is the beginning of what they really mean by APU and there will be more architecture movement towards that end in the future. Could this be a transistion CPU to a possibly very different x86 future?

    This may not be just what AMD is planning to do on it's own. There have been rumors of a possible Arm partnership.
    http://semiaccurate.com/2011/06/22/amd-and-arm-joi...

    Could it be that this chip has a better set up than phenom for an interchangeable modular structure?

    2. With desktop pcs in decline could this be a move to capture more server space, which is still a growing market?

    3. This obviously also begs the question is there some benefit of this design with a gpu attached?

    4. Is there some benefit for mobile computing?(starting to stretch here...)

    I don't know. I don't want to think this is just an epic fail but...
    This is kind of sad since I was betting they'd be 3/3 but on the really big one the shot out a dud.
  • fic2 - Wednesday, October 12, 2011 - link

    Kind of wondering about #3.

    Let the wait for Trinity begin. Hopefully the changes from Bulldozer->Piledriver help more than is expected.

    If the FM1 platform wasn't dead I would think about getting a Llano desktop for my nephew but I think he'll just have to wait. Maybe if FM2 mb start coming out and Llano can drop in with a possible change to Trinity later.
  • Mishera - Thursday, October 13, 2011 - link

    Yeah, I think I meant #3 to be part of #4. I cant help but to think that is bulldozer performs poorly in a trinity package that's very bad news for Amd, even if this performs well in servers..

    I am left wondering how much of bulldozer as an architecture is an evolutionary step to the future they've described. I think that's much more important than the performance we see today. Perhaps this could in that respect be a Fermi and not so much Pentium 4.
  • tipoo - Wednesday, October 12, 2011 - link

    Their own last generation 6 core Thuban beats this in half the tasks. If you have an application that effectively uses 8 threads, this might be a worthy upgrade, but anything lightly threaded is pretty bad (looking at the real world benchmarks, Techreport, Anandtech, Tomshardware, etc). I had high hopes for this.

    They did say though that Windows 8 would make better use of modules (vs cores) and will know what to do with them better, and to expect another 10% increase from that. But we're still at a point where an AMD core doesn't even beat out a Nehalem core, let alone a Sandy Bridge or Ivy Bridge.

    *Le Sigh*
    This Bulldozer is more of a Mudshovel. Their goal of 15% single threaded performance increase per core per year won't have them catching up to Intel anytime soon either.

    Well, the optimist in me says the L3 cache-less higher clocked quad core mainstream parts will be more competitive. And cheap too, the 6 core FX is only 169.

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