What is DDR3?

To provide compatibility and interchangeability for computer memory, the structure and form factor are controlled by a standards organization known as JEDEC. JEDEC specifies voltages, speeds, timings, communication protocols, bank addressing, and many other factors in the design and development of memory DIMMs. Taking a closer look at publications at www.jedec.org can provide insight into what DDR3 brings to the market and where it might go. Comparing DDR2 and DDR3 several interesting points stand out.

Official JEDEC Specifications
Rated Speed 400-800 Mbps 800-1600 Mbps
Vdd/Vddq 1.8V +/- 0.1V 1.5V +/- 0.075V
Internal Banks 4 8
Termination Limited All DQ signals
Topology Conventional T Fly-by
Driver Control OCD Calibration Self Calibration with ZQ
Thermal Sensor No Yes (Optional)

Please keep in mind that JEDEC specs are official. They are a starting point for enthusiast memory companies. However, since there was never a JEDEC standard for memory faster than DDR-400 then DDR memory running at faster speeds is really overclocked DDR-400. Similarly DDR2 memory faster than DDR2-800 is actually overclocked DDR2-800 since there is currently no official JEDEC spec for DDR2-1066.

DDR speeds ran to DDR-400, DDR2 has official specs from 400 to 800, and DDR3 will extend this from 800 to 1600 based on the current JEDEC specification. Initial DDR3 offerings will be 1066 and 1333 will quickly follow. The 1333 speed is important because it matches the 1333 bus speed of the new Intel processors. The 1333 processors can run any speed of DDR3 or DDR2 memory, but 800 and 1067 will be overlap speeds with DDR2. 1333 will be the first DDR3 speed to offer enhanced memory speeds to current and future processors.

Since DDR3 is designed to run at higher memory speeds the signal integrity of the memory module is now more important. DDR3 uses something called "fly-by" technology instead of the "T branches" seen on DDR2 modules. This means the address and control lines are a single path chaining from one DRAM to another, where DDR2 uses a T topology that branches on DDR2 modules. "Fly-by" takes away the mechanical line balancing and uses automatic signal time delay generated by the controller fixed at the memory system training. Each DDR3 DRAM chip has an automatic leveling circuit for calibration and to memorize the calibration data.

DDR3 also uses more internal banks - 8 instead of the 4 used by DDR2 - to further speed up the system. More internal banks allow advance prefetch to reduce access latency. This should become more apparent as the size of the DRAM increases in the future.

DDR3 further reduces the memory voltage. In the past few years we have moved from 2.5V with DDR to 1.8V with DDR2. DDR3 drops memory voltage to 1.5V, which is a 16% reduction from DDR2. There are also additional built-in power conservation features with DDR3 like partial refresh. This could be particularly important in mobile applications where battery power will no longer be needed just to refresh a portion of the DRAM not in active use. There is also a specification for an optional thermal sensor that could allow mobile engineers to save further power by providing minimum refresh cycles when the system is not in high performance mode.

There is even more to DDR3, but for most enthusiasts looking at a new desktop system DDR3 can provide higher official speeds, up to 1600MHz. The higher speeds are available at lower voltage, with 1.5V as the official specification. There are many features that will not make much difference in DDR3 performance until we begin to see even faster and higher capacity memory. The question, then, is whether DDR3 memory provides better performance for the computer enthusiast than current DDR2?

Index DDR3 Memory and P35 motherboards


View All Comments

  • Wesley Fink - Tuesday, May 15, 2007 - link

    Yes. The P965 would not boot witha a CAS setting of 6 even though it could be selected. So the P965 was tested at 5-6-6 timings. The same DDR2 on the P5K was tested at 6-6-6, which would work and also matched the DDR3 timings. We will clarify this in the article.
  • TA152H - Tuesday, May 15, 2007 - link

    OK, thanks.

    One thing I would suggest when you do the final tests for the Bearlake and DDR3 is to use the 2M processors as well. You'd expect the 4M cache to hide the differences better, obviously, so the 2M cache processors would be pretty interesting to see as well, if for no other reason to see how much the larger cache does mask the difference in the chipset and memory. Since Intel is planning on increasing cache sizes, it would be a pretty useful data point.
  • TA152H - Tuesday, May 15, 2007 - link

    You measured the performance of the memory, but why not take a power measurement of it as well. That is one of the draws of the technology, it uses lower voltage, and therefore should use a little less power and generate less heat. Both are significant.

    Good article though, I just wish that had been included.
  • kalrith - Tuesday, May 15, 2007 - link

    Page 2, second line of second-to-last paragraph says, "which is a 16% reduction form DDR2". "form" should be "from".

    Last page, fourth line of third-to-last paragraph says, "the shift to DDR2 may be further delayed". "DDR2" should be "DDR3".

    BTW, I found the article interesting, informative, enlightening, and unbiased (as usual).
  • Wesley Fink - Tuesday, May 15, 2007 - link

    Mild dyslexia and less-than smart built-in spell checkers always win :) Both errors are corrected. Thanks. Reply

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