Fall IDF 2005 - Day 2: Pat Gelsinger Reveals Intel's Server Plansby Anand Lal Shimpi on August 24, 2005 1:39 PM EST
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Tulsa: 1.3 billion transistors in a Xeon
Intel introduced the Tulsa processor, based on Intel's next-generation micro-architecture. The Tulsa processor is a dual core CPU, with a massive 16MB shared L3 cache totalling up 1.3 billion transistors on Intel's 65nm process.
Tulsa will work on the Bensley platform, which uses Intel's Blackford chipset.
The Blackford chipset features dual independent front-side buses offering 17GB/s of bandwidth to the two processors.
The Blackford chipset also features a 4-channel FB-DIMM memory controller, also offering 17GB/s of bandwidth to memory. The use of FB-DIMM technology has also allowed Intel to increase memory capacity on this chipset to 64GB.
The Bensley platform is already quite mature, with all of today's demos being run on Bensley with Dempsey CPUs. The most important point about Bensley is that it is compatible with both Dempsey and Woodcrest CPUs, meaning that a Bensley platform bought at the beginning of next year can accept the new Intel CPUs released at the end of next year without any hardware changes.