Core-to-Core Latency

As the core count of modern CPUs is growing, we are reaching a time when the time to access each core from a different core is no longer a constant. Even before the advent of heterogeneous SoC designs, processors built on large rings or meshes can have different latencies to access the nearest core compared to the furthest core. This rings true especially in multi-socket server environments.

But modern CPUs, even desktop and consumer CPUs, can have variable access latency to get to another core. For example, in the first generation Threadripper CPUs, we had four chips on the package, each with 8 threads, and each with a different core-to-core latency depending on if it was on-die or off-die. This gets more complex with products like Lakefield, which has two different communication buses depending on which core is talking to which.

If you are a regular reader of AnandTech’s CPU reviews, you will recognize our Core-to-Core latency test. It’s a great way to show exactly how groups of cores are laid out on the silicon. This is a custom in-house test, and we know there are competing tests out there, but we feel ours is the most accurate to how quick an access between two cores can happen.


Click to enlarge (lots of cores and threads = lots of core pairings)

Comparing core to core latencies from Zen 4 (7950X) and Zen 3 (5950X), both are using a two CCX 8-core chiplet design, which is a marked improvement over the four CCX 16-core design featured on the Zen 2 microarchitecture, the Ryzen 9 3950X. The inter-core latencies within the L3 cache range from between 15 ns and 19 ns. The inter-core latencies between different cores within different parts of the CCD show a larger latency penalty of up to 79.5 ns, which is something AMD should work on going forward, but it's an overall improvement in cross CCX latencies compared to Zen 3. Any gain is still a gain.

Even though AMD has opted for a newer and more 'efficient' IOD which is based on TSMC's 6 nm node. It is around the same size physically as the previous AMD IOD on Zen 3 manufactured on GlobalFoundries 12 nm node, but with a much larger transistor count. Within the IOD is the newly integrated RDNA 2 graphics, although this isn't typical iGPU in the sense that an APU is. A lot of the room on the IOD is made up of the DDR5 memory controller or IMC, as well as the chips PCIe 5.0 lanes, and of course, connects to the logic through its primary interconnect named Infinity Fabric. All of these variables play a part on power, latency, and operation.


AMD Ryzen 9 5950X Core-to-Core Latency results

It's actually astounding how similar the latency performance of the Ryzen 9 7950X (Zen 4) is when compared directly to the Ryzen 9 5950X (Zen 3), despite being on the new 5 nm TSMC manufacturing process. Even with a change of IOD, but with the same interconnect, the inter-core latencies within the Ryzen 9 7950X are great in terms of cores within the same core complex; latency does degrade when pairing up with a core in another chiplet, but this works and AMD's Ryzen 5000 series proved that the overall penalty performance is negatable.

Test Bed and Setup SPEC2017 Single-Threaded Results
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  • jakky567 - Monday, September 26, 2022 - link

    I'm confused by USB 2, do you mean USB 2.0 or USB 4v2, or what? Reply
  • Ryan Smith - Monday, September 26, 2022 - link

    Yes, USB 2.0.

    USB 4v2 was just announced. We're still some time off from it showing up in any AMD products.
    Reply
  • Myrandex - Thursday, September 29, 2022 - link

    lol did they share any reason why to give a single USB 2.0 port? Reply
  • Ryan Smith - Friday, September 30, 2022 - link

    Basic, low complexity I/O. Implementing a USB 2.x port is relatively simple these days. It's a bit of a failsafe, really. Reply
  • LuxZg - Monday, September 26, 2022 - link

    One question and one observation.

    Q: ECO mode says 170W -> 105W but tested CPU was 170W -> 65W. Is that a typo or was that just to show off? I wish that sample graph showed 7600X at 105W and 65W in addition to 7950X at 170/105/65W.

    Observation: 5800X is 260$ on Amazon. So with cheaper DDR4, cheaper MBOs, and cheaper CPU, it will be big competition inside AMD's own house. At least for those that don't "need" PCIe 5.0 or future proofing.
    Reply
  • andrewaggb - Monday, September 26, 2022 - link

    I was confused by that as well.
    The way I read the paragraph suggested 170w eco mode is 105w but then it's stated the cpu was tested at 65w. Was it meant to say 105w or can a 170w be dialed down to 65w and the test is correctly labelled?
    Reply
  • Otritus - Monday, September 26, 2022 - link

    By default while under 95*C, 203*F, 368.15K, the 7950X will have a TDP of 170 watts and use up to 230 watts of power. You can think of it like TDP and Turbo Power on Intel. Eco mode will reduce TDP to 105 watts (and use up to 142 watts??). You can manually set the power limits, and Anandtech set them to 65 watts to demonstrate efficiency. Meaning the 7950X was not in eco mode, but a manual mode more efficient than eco mode. Reply
  • uefi - Monday, September 26, 2022 - link

    Just by supporting Microsoft's cloud connected hardware DRM makes the 7000 series vastly inferior to all current Intel CPUs. Reply
  • Makaveli - Monday, September 26, 2022 - link

    So you are saying intel is not going to implement this in any of their Future processors?

    If the Raptorlake review shows it supports that also i'm going to back to this message.
    Reply
  • socket420 - Monday, September 26, 2022 - link

    I don't understand where these "intel rulez because they don't use pluton!!" people are coming from - one, the Intel Management Engine... exists, and two, Microsoft explicitly stated that Pluton was developed with the support of AMD, Intel and Qualcomm back in 2020. Intel is clearly on-board with it and I expect to see Pluton included in Raptor Lake or Meteor Lake, they're just late to the party because that's what Intel does best, I guess? Reply

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