Core-to-Core Latency

As the core count of modern CPUs is growing, we are reaching a time when the time to access each core from a different core is no longer a constant. Even before the advent of heterogeneous SoC designs, processors built on large rings or meshes can have different latencies to access the nearest core compared to the furthest core. This rings true especially in multi-socket server environments.

But modern CPUs, even desktop and consumer CPUs, can have variable access latency to get to another core. For example, in the first generation Threadripper CPUs, we had four chips on the package, each with 8 threads, and each with a different core-to-core latency depending on if it was on-die or off-die. This gets more complex with products like Lakefield, which has two different communication buses depending on which core is talking to which.

If you are a regular reader of AnandTech’s CPU reviews, you will recognize our Core-to-Core latency test. It’s a great way to show exactly how groups of cores are laid out on the silicon. This is a custom in-house test, and we know there are competing tests out there, but we feel ours is the most accurate to how quick an access between two cores can happen.


Click to enlarge (lots of cores and threads = lots of core pairings)

Comparing core to core latencies from Zen 4 (7950X) and Zen 3 (5950X), both are using a two CCX 8-core chiplet design, which is a marked improvement over the four CCX 16-core design featured on the Zen 2 microarchitecture, the Ryzen 9 3950X. The inter-core latencies within the L3 cache range from between 15 ns and 19 ns. The inter-core latencies between different cores within different parts of the CCD show a larger latency penalty of up to 79.5 ns, which is something AMD should work on going forward, but it's an overall improvement in cross CCX latencies compared to Zen 3. Any gain is still a gain.

Even though AMD has opted for a newer and more 'efficient' IOD which is based on TSMC's 6 nm node. It is around the same size physically as the previous AMD IOD on Zen 3 manufactured on GlobalFoundries 12 nm node, but with a much larger transistor count. Within the IOD is the newly integrated RDNA 2 graphics, although this isn't typical iGPU in the sense that an APU is. A lot of the room on the IOD is made up of the DDR5 memory controller or IMC, as well as the chips PCIe 5.0 lanes, and of course, connects to the logic through its primary interconnect named Infinity Fabric. All of these variables play a part on power, latency, and operation.


AMD Ryzen 9 5950X Core-to-Core Latency results

It's actually astounding how similar the latency performance of the Ryzen 9 7950X (Zen 4) is when compared directly to the Ryzen 9 5950X (Zen 3), despite being on the new 5 nm TSMC manufacturing process. Even with a change of IOD, but with the same interconnect, the inter-core latencies within the Ryzen 9 7950X are great in terms of cores within the same core complex; latency does degrade when pairing up with a core in another chiplet, but this works and AMD's Ryzen 5000 series proved that the overall penalty performance is negatable.

Test Bed and Setup SPEC2017 Single-Threaded Results
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  • tuxRoller - Monday, September 26, 2022 - link

    When does an explanation become an excuse? Reply
  • UltraTech79 - Friday, September 30, 2022 - link

    Well rehire them or youre going to see a real quality loss. Is it really worth it in the longrun? Reply
  • Ryan Smith - Friday, September 30, 2022 - link

    "Is it really worth it in the longrun?"

    That's a question for the people that pay the bills. It's not my call.
    Reply
  • Iketh - Saturday, October 1, 2022 - link

    I will professionally edit for next to nothing just because I love this site. Email me iketh28@yahoo.com Reply
  • ScottSoapbox - Tuesday, October 4, 2022 - link

    Grammarly is a cheap replacement that will catch the worst of it. Reply
  • Sivar - Monday, September 26, 2022 - link

    I agree that the paragraph was in need of some work, but "thinkos" happen, esp. with an article of this depth. I like that you reported it, but I wonder if it could have been worded differently. Imagine spending days aggressively writing a detailed analysis, only to have one's writing compared to a stroke victim because of a tiny percent of the article. Reply
  • Jasonovich - Sunday, October 9, 2022 - link

    Grammar fascism is distracting from the main body of the article. It's like the cream from your glass of Guinness pouring on to your fingers, no big deal just lick it off. The integrity of the article is intact and I'm sure the message was received loud and clear from Anandtech's spoof readers.
    Anyway many thanks for the excellent article, other sites don't try half as hard as the folks from Anandtech.
    Reply
  • philehidiot - Wednesday, September 28, 2022 - link

    This sentence seems perfectly cromulent. I think the point purvulates nicely and is quite unfornitabulated. Reply
  • gryer7421 - Monday, September 26, 2022 - link

    Hi, thanks for the article. In the future .. please start posting HIGHEST all-die TEMPS hit during each benchmark..

    It would be help to know and see the temps for building workstations given that INTEL and AMD both just uncorked the genie by not caring about temps anymore and only caring about ''top cou speed'' at ant (thermal) cost.
    Reply
  • Gavin Bonshor - Monday, September 26, 2022 - link

    With Zen 4, the highest all-die temp is essentially 95°C, due to the way Precision Boost Overdrive works. The idea is that it will use all over the available power/thermal headroom, so those with better CPU cooling, should technically benefit more. Reply

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