CPU Tests: Microbenchmarks

Core-to-Core Latency

As the core count of modern CPUs is growing, we are reaching a time when the time to access each core from a different core is no longer a constant. Even before the advent of heterogeneous SoC designs, processors built on large rings or meshes can have different latencies to access the nearest core compared to the furthest core. This rings true especially in multi-socket server environments.

But modern CPUs, even desktop and consumer CPUs, can have variable access latency to get to another core. For example, in the first generation Threadripper CPUs, we had four chips on the package, each with 8 threads, and each with a different core-to-core latency depending on if it was on-die or off-die. This gets more complex with products like Lakefield, which has two different communication buses depending on which core is talking to which.

If you are a regular reader of AnandTech’s CPU reviews, you will recognize our Core-to-Core latency test. It’s a great way to show exactly how groups of cores are laid out on the silicon. This is a custom in-house test built by Andrei, and we know there are competing tests out there, but we feel ours is the most accurate to how quick an access between two cores can happen.

All three CPUs exhibit the same behaviour - one core seems to be given high priority, while the rest are not.

Frequency Ramping

Both AMD and Intel over the past few years have introduced features to their processors that speed up the time from when a CPU moves from idle into a high powered state. The effect of this means that users can get peak performance quicker, but the biggest knock-on effect for this is with battery life in mobile devices, especially if a system can turbo up quick and turbo down quick, ensuring that it stays in the lowest and most efficient power state for as long as possible.

Intel’s technology is called SpeedShift, although SpeedShift was not enabled until Skylake.

One of the issues though with this technology is that sometimes the adjustments in frequency can be so fast, software cannot detect them. If the frequency is changing on the order of microseconds, but your software is only probing frequency in milliseconds (or seconds), then quick changes will be missed. Not only that, as an observer probing the frequency, you could be affecting the actual turbo performance. When the CPU is changing frequency, it essentially has to pause all compute while it aligns the frequency rate of the whole core.

We wrote an extensive review analysis piece on this, called ‘Reaching for Turbo: Aligning Perception with AMD’s Frequency Metrics’, due to an issue where users were not observing the peak turbo speeds for AMD’s processors.

We got around the issue by making the frequency probing the workload causing the turbo. The software is able to detect frequency adjustments on a microsecond scale, so we can see how well a system can get to those boost frequencies. Our Frequency Ramp tool has already been in use in a number of reviews.

From an idle frequency of 800 MHz, It takes ~16 ms for Intel to boost to the top frequency for both the i9 and the i5. The i7 was most of the way there, but took an addition 10 ms or so. 

Power Consumption: Caution on Core i9 CPU Tests: Office and Science
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  • mitox0815 - Tuesday, April 13, 2021 - link

    "Just abandon"...those clocks you dream of might have been possible on certain CPUs, but definitely noton a broader line-up. The XPs ran hot enough as it was, screwing more out of them would've made no sense. THAT they tried with the 9590...and failed miserably. Not to mention people could OC the Northwoods too, beyond 3.6 or 3.7 Ghz in fact...negating that point entirely. As was said...Northwood, especially the FSB800 ones with HT were the top dogs until the A64 came around and showed them the door. Prescott was...ambitious, to put it nicely.
  • mitox0815 - Tuesday, April 13, 2021 - link

    *not on
  • TheinsanegamerN - Wednesday, March 31, 2021 - link

    Netburst was built for both high clock speeds and predictable workloads, such as video editing, where it did quite well. Obviously it royally sucked for unpredictable workloads like gaming, but you could see where intel was heading with the idea.
  • Oxford Guy - Wednesday, March 31, 2021 - link

    'you could see where intel was heading with the idea'

    Creating the phrase 'MHz myth' in the public consciousness.
  • GeoffreyA - Friday, April 2, 2021 - link

    "MHz myth in the public consciousness"

    And it largely worked, even in the K8 era with the non-enthusiast public. Only when Core 2 Duo dropped to lower clocks was it accepted overnight that, yes, lower clocks are now all right because Intel says so.
  • Prosthetic Head - Tuesday, March 30, 2021 - link

    Your point still stands, however P4 was also a VERY low bar for to measure IPC improvements relative to.
  • Hifihedgehog - Tuesday, March 30, 2021 - link

    Well, Bulldozer was too and look what AMD did with Ryzen...
  • Oxford Guy - Saturday, April 3, 2021 - link

    AMD had a long time. 2011 is stamped onto the spreader of Piledriver and that was only a small incremental change from Bulldozer, which is even older.
  • Oxford Guy - Saturday, April 3, 2021 - link

    And, Bulldozer had worse IPC than Phenom. So, AMD had basically tech eternity to improve on the IPC of what it was offering. It made Zen 1 seem a lot more revolutionary.
  • GeoffreyA - Saturday, April 3, 2021 - link

    "It made Zen 1 seem a lot more revolutionary"

    You're right; and if one compares against Haswell or Skylake, one will see that the Intel and AMD designs are crudely the same from a bird's-eye point of view, except for AMD's split-scheduler inherited from the Athlon. I think that goes to show there's pretty much only one way to make an efficient x86 CPU (notice departures are disastrous: Netburst/Bulldozer). Having said that, I'm glad AMD went through the BD era: taught them a great deal. Also forced them to start from scratch, which took their design further than revising K10 would have done.

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