We’ve known about Intel’s Cooper Lake platform for a number of quarters. What was initially planned, as far as we understand, as a custom silicon variant of Cascade Lake for its high-profile customers, it was subsequently productized and aimed to be inserted into a delay in Intel’s roadmap caused by the development of 10nm for Xeon. Set to be a full range update to the product stack, in the last quarter, Intel declared that its Cooper Lake platform would end up solely in the hands of its priority customers, only as a quad-socket or higher platform. Today, Intel launches Cooper Lake, and confirms that Ice Lake is set to come out later this year, aimed at the 1P/2P markets.

Count Your Coopers: BFloat16 Support

Cooper Lake Xeon Scalable is officially designated as Intel’s 3rd Generation of Xeon Scalable for high-socket count servers. Ice Lake Xeon Scalable, when it launches later this year, will also be called 3rd Generation of Xeon Scalable, except for low core count servers.

For Cooper Lake, Intel has made three key additions to the platform. First is the addition of AVX512-based BF16 instructions, allowing users to take advantage of the BF16 number format. A number of key AI workloads, typically done in FP32 or FP16, can now be performed in BF16 to get almost the same throughput as FP16 for almost the same range of FP32. Facebook made a big deal about BF16 in its presentation last year at Hot Chips, where it forms a critical part of its Zion platform. At the time the presentation was made, there was no CPU on the market that supported BF16, which led to this amusing exchange at the conference:

BF16 (bfloat16) is a way of encoding a number in binary that attempts to take advantage of the range of a 32-bit number, but in a 16-bit format such that double the compute can be packed into the same number of bits. The simple table looks a bit like this:

Data Type Representations
Type Bits Exponent Fraction Precision Range Speed
float32 32 8 23 High High Slow
float16 16 5 10 Low Low 2x Fast
bfloat16 16 8 7 Lower High 2x Fast

By using BF16 numbers rather than FP32 numbers, it would also mean that memory bandwidth requirements as well as system-to-system network requirements could be halved. On the scale of a Facebook, or an Amazon, or a Tencent, this would appeal to them. At the time of the presentation at Hot Chips last year, Facebook confirmed that it already had silicon working on its datasets.

Doubling Socket-to-Socket Interconnect Bandwidth

The second upgrade that Intel has made to Cooper Lake over Cascade Lake is in socket-to-socket interconnect. Traditionally Intel’s Xeon processors have relied on a form of QPI/UPI (Ultra Path Interconnect) in order to connect multiple CPUs together to act as one system. In Cascade Lake Xeon Scalable, the top end processors each had three UPI links running at 10.4 GT/s. For Cooper Lake, we have six UPI links also running at 10.4 GT/s, however these links still only have three controllers behind them such that each CPU can only connect to three other CPUs, but the bandwidth can be doubled.

This means that in Cooper Lake, each CPU-to-CPU connection involves two UPI links, each running at 10.4 GT/s, for a total of 20.8 GT/s. Because the number of links is doubled, rather than an evolution of the standard, there are no power efficiency improvements beyond anything Intel has done to the manufacturing process. Note that double the bandwidth between sockets is still a good thing, even if latency and power per bit is still the same.

Intel still uses the double pinwheel topology for its eight socket designs, ensuring at max two hops to any required processor in the set. Eight socket is the limit with a glueless network – we have already seen companies like Microsoft build servers with 32 sockets using additional glue logic.

Memory and 2nd Gen Optane

The third upgrade for Cooper Lake is the memory support. Intel is now supporting DDR4-3200 with the Cooper Xeon Platinum parts, however only in a 1 DIMM per channel (1 DPC) scenario. 2 DPC is supported, but only at DDR4-2933. Support for DDR4-3200 technically gives the system a boost from 23.46 GB/s per channel to 25.60 GB/s, an increase of 9.1%.

The base models of Cooper Lake will also be updated to support 1.125 TiB of memory, up from 1 TB. This allows for a 12 DIMM scenario where six modules are 64 GB and six modules are 128 GB. One of the complaints about Cascade Xeons was that in 1 TB mode, it would not allow for an even capacity per memory channel when it was filled with memory, so Intel have rectified this situation. In this scenario, it means that the six 128 GB modules could also be Optane. Why Intel didn’t go for the full 12 * 128 GB scenario, we’ll never know.

The higher memory capacity processors will support 4.5 TB of memory, and be listed as ‘HL’ processors.

Cooper Lake will also support Intel’s second generation 200-series Optane DC Persistent Memory, codenamed Barlow Pass. 200-series Optane DCPMM will still available in 128 GB, 256 GB, and 512 GB modules, same as the first generation, and will also run at the same DDR4-2666 memory speed. Intel claims that this new generation of Optane offers 25% higher memory bandwidth than the previous generation, which we assume comes down to a new generation of Optane controller on the memory and software optimization at the system level.

Intel states that the 25% performance increase is when they compare 1st gen Optane DCPMM to 2nd gen Optane DCPMM at 15 W, both operating at DDR4-2666. Note that the first-gen could operate in different power modes, from 12 W up to 18 W. We asked Intel if the second generation was the same, and they stated that 15 W is the maximum power mode offered in the new generation.

Socket, Silicon, and SKUs
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  • Spunjji - Friday, June 19, 2020 - link

    It's the same line every time. It's like listening to a realtor trying to sell a house on a cliff-side.

    "Lovely ocean views, hasn't fallen into the sea any time in the past 20 years, so why would you ever expect it to?"

    It also sets up the weird false dichotomy that Intel can't be executing poorly if they're still selling lots of their products; as if the global CPU market would just go away tomorrow just because Intel were selling junk.
  • Deicidium369 - Saturday, June 20, 2020 - link

    Yeah - revenues and profits are never used to measure a business. It's about fee fees and the # of rabid AMD supporters...

    Sorry that Intel consistently provides what the market wants, and make record revenue quarter after quarter - and AMD Epycs are sitting in systems at the OEMs - since no one is buying them
  • schujj07 - Saturday, June 20, 2020 - link

    Just because someone makes profit doesn't mean it makes what the market wants. Sometimes there is only one option so by design you will make a profit. Doesn't mean that just because you are the only player that your product is what people want. More often than not the product does an OK job but people want something different. In IT data centers the people making the decisions are often times older or just don't know any better. Not to mention when trying to come into a market in which 1 player has >=95% of the mark share it will take time to make inroads.
  • Spunjji - Friday, June 19, 2020 - link

    Threadripper isn't a competitor for this product.
  • Duncan Macdonald - Thursday, June 18, 2020 - link

    What low price 4S Xeon ? A 16 core 4 socket 4.5TB Xeon (the 6328HL) has a list price of $4779
    so 4 of these gives a list price of over $19,000 - for comparison a single 7702P costs $4600 and has the same 64 cores as the 4 Xeon CPUs put together and a maximum memory of 4TB (and for good measure has 128 PCIe 4 lanes vs 20 PCIe lanes per Xeon CPU). By the time that you include the price of the required extras for a 4 socket system (4 socket motherboard, special power supplies etc) the 4S Intel system is far more costly than the single socket AMD system.
  • flgt - Thursday, June 18, 2020 - link

    Unless you're a FB or Intel employee, no one has any idea what the real price they pay for these processors. And only AMD and Intel know the margins that can be sacrificed to secure a crucial design win. You also have to balance the manufacturing capacity that can be brought to the table at a given price point. That's a huge advantage for Intel even with all the bad press their manufacturing has received. They can choose to pull capacity from low margin retail products if needed. AMD would have to negotiate with TSMC and compete against their other critical clients for capacity.
  • Spunjji - Friday, June 19, 2020 - link

    Technically AMD can also choose to pull capacity from their desktop processor sales if needs be, but you're right that the overall constraints on their manufacturing capacity are more severe.
  • Spunjji - Friday, June 19, 2020 - link

    Also worth noting that there's a difference between how much these things cost at list price, how much they cost for a massive organisation buying a few hundred units, and how much they cost for SMEs buying from resellers. I used to work for a large EU reseller and can confirm that even with the customary discounts and bids in place, 4S systems carry a substantial premium over 2S.
  • Deicidium369 - Saturday, June 20, 2020 - link

    who cares about some fictional EU retailer you "worked for"...

    2 socket cost more than a single socket
    4 socket cost more than 2 socket
    8 socket cost more than 4 socket.

    The higher socket count are more expensive per socket than the lower socket count systems - due to the workload and specialized nature of a use case that requires 8 sockets.

    Didn't need to work somewhere to know that.
  • Korguz - Saturday, June 20, 2020 - link

    and who cares the BS and FUD that you claim is your own fictional life, but yet, you constantly brad boast and keep making it up as you go along.

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