Section by Andrei Frumusanu

SPEC2017 and SPEC2006 Results (15W)

SPEC2017 and SPEC2006 is a series of standardized tests used to probe the overall performance between different systems, different architectures, different microarchitectures, and setups. The code has to be compiled, and then the results can be submitted to an online database for comparsion. It covers a range of integer and floating point workloads, and can be very optimized for each CPU, so it is important to check how the benchmarks are being compiled and run.

We run the tests in a harness built through Windows Subsystem for Linux, developed by our own Andrei Frumusanu. WSL has some odd quirks, with one test not running due to a WSL fixed stack size, but for like-for-like testing is good enough. SPEC2006 is deprecated in favor of 2017, but remains an interesting comparison point in our data. Because our scores aren’t official submissions, as per SPEC guidelines we have to declare them as internal estimates from our part.

For compilers, we use LLVM both for C/C++ and Fortan tests, and for Fortran we’re using the Flang compiler. The rationale of using LLVM over GCC is better cross-platform comparisons to platforms that have only have LLVM support and future articles where we’ll investigate this aspect more. We’re not considering closed-sourced compilers such as MSVC or ICC.

clang version 8.0.0-svn350067-1~exp1+0~20181226174230.701~1.gbp6019f2 (trunk)
clang version 7.0.1 (ssh://git@github.com/flang-compiler/flang-driver.git
 24bd54da5c41af04838bbe7b68f830840d47fc03)

-Ofast -fomit-frame-pointer
-march=x86-64
-mtune=core-avx2
-mfma -mavx -mavx2

Our compiler flags are straightforward, with basic –Ofast and relevant ISA switches to allow for AVX2 instructions. Despite ICL supporting AVX-512, we have not currently implemented it, as it requires a much greater level of finesse with instruction packing. The best AVX-512 software uses hand-crafted intrinsics to provide the instructions, as per our 3PDM AVX-512 test later in the review.

For these comparisons, we will be picking out CPUs from across our dataset to provide context. Some of these might be higher power processors, it should be noted.

SPECint2006

SPECint2006 Speed Estimated Scores

Amongst SPECint2006, the one benchmark that really stands out beyond all the rest is the 473.astar. Here the new Sunny Cove core is showcasing some exceptional IPC gains, nearly doubling the performance over the 8550U even though it’s clocked 100MHz lower. The benchmark is extremely branch misprediction sensitive, and the only conclusion we can get to rationalise this increase is that the new branch predictors on Sunny Cove are doing an outstanding job and represent a massive improvement over Skylake.

456.hmmer and 464.h264ref are very execution bound and have the highest actual instructions per clock metrics in this suite. Here it’s very possible that Sunny Cove’s vastly increased out-of-order window is able to extract a lot more ILP out of the program and thus gain significant increases in IPC. It’s impressive that the 3.9GHz core here manages to match and outpace the 9900K’s 5GHz Skylake core.

Other benchmarks here which are limited by other µarch characteristics have various increases depending on the workload. Sunny Cove doubled L2 cache should certainly help with workloads like 403.gcc and others. However because we’re also memory latency limited on this platform the increases aren’t quite as large as we’d expect from a desktop variant of ICL.

SPECfp2006(C/C++) Speed Estimated Scores

In SPECfp2006, Sunny Cove’s wider out-of-order window can again be seen in tests such as 453.povray as the core is posting some impressive gains over the 8550U at similar clocks. 470.lbm is also instruction window as well as data store heavy – the core’s doubled store bandwidth here certainly helps it.

SPEC2006 Speed Estimated Total

Overall in SPEC2006, the new i7-1065G7 beats a similarly clocked i7-8550U by a hefty 29% in the int suite and 34% in the fp suite. Of course this performance gap will be a lot smaller against 9th gen mobile H-parts at higher clocks, but these are also higher TDP products.

The 1065G7 comes quite close to the fastest desktop parts, however it’s likely it’ll need a desktop memory subsystem in order to catch up in total peak absolute performance.

SPEC2006 Speed Estimated Performance Per GHz

Performance per clock increases on the new Sunny Cove architecture are outstandingly good. IPC increases against the mobile Skylake are 33 and 38% in the integer and fp suites, though we also have to keep in d mind these figures go beyond just the Sunny Cove architecture and also include improvements through the new LPDDR4X memory controllers.

Against a 9900K, although apples and oranges, we’re seeing 13% and 14% IPC increases. These figures likely would be higher on an eventual desktop Sunny Cove part.

SPEC2017

SPECint2017 Rate-1 Estimated Scores

SPECfp2017 Rate-1 Estimated Scores

SPEC2017 Rate-1 Estimated Total

The SPEC2017 results look similar to the 2006 ones. Against the 8550U, we’re seeing grand performance uplifts, just shy of the best desktop processors.

SPEC2017 Speed Estimated Performance Per GHz

Here the IPC increase also look extremely solid. In the SPECin2017 suite the Ice Lake part achieves a 14% increase over the 9900K, however we also see a very impressive 21% increase in the fp suite.

Overall in the 2017 suite, we’re seeing a 19% increase in IPC over the 9900K, which roughly matches Intel’s advertised metric of 18% IPC increase.

Security Updates, Improved Instruction Performance and AVX-512 Updates Power Results (15W and 25W)
Comments Locked

261 Comments

View All Comments

  • jospoortvliet - Friday, August 2, 2019 - link

    Sometimes people have insightful additions or questions. That is never you so I wouldn’t miss your ‘input’.
  • Phynaz - Friday, August 2, 2019 - link

    But yet you replied. Doh!
  • Korguz - Friday, August 2, 2019 - link

    and so did you !!! :-)
  • Phynaz - Saturday, August 3, 2019 - link

    Your comprehension skills aren’t that great, are they. Maybe that’s why you can’t afford a good cpu. Did you finish school?
  • Korguz - Saturday, August 3, 2019 - link

    yep.. but you obliviously havent as only children resort to insults, like you do. and again.. grow up
  • POlaris1983 - Thursday, August 1, 2019 - link

    Thermals and TDP are a test for UNdervolting and OCing on THICC laptops using ai windows OS GUI interface apps for easy one button flipping on and off for these CPUs and GPUs and RAM Timings customizations. Even for desktop towers soon using keyboard functions in special keys like on a laptop once they solve the luqid cooling issues on the THICC laptops.
  • thetrashcanisfull - Thursday, August 1, 2019 - link

    Ian,
    In this and the Ryzen 3000 review, I noticed that the 3DPM benchmarks with AVX enabled seem to benefit from AVX-512 much more than I would anticipate.

    If I'm understanding things correctly, the AVX-512 parts are capable of 2x512b FMAC / cycle in the case of Skylake-server or 1x512b FMAC + 1x512b ALU / cycle in the case of Sunny Cove, with both handling 2x512b load + 1x512b store / cycle. This would suggest to me that their vector FP performance/cycle ought to be around double that of Skylake-client or Zen 2, both of which do 2x256b FMAC / cycle and 2x256b loads + 1x256b store / cycle. However, in the 3DPM benchmark we see AVX-512 CPUs outpace the performance/cycle of AVX2 CPUs by a factor of 4 - possibly even more than 4, once we account for the frequency penalties associated with AVX-512!

    Am I misunderstanding some critical piece of the AVX-512 extension that explains this boost, or is there something wrong with the AVX2 codepath for this benchmark? Only using xmm instructions? Not using FMA instructions?
  • Mysticial - Friday, August 2, 2019 - link

    A while back, Ian sent me the non-vectorized and AVX512-vectorized binaries for 3DPM for me to analyze. (I never looked at the AVX2 version since this was before it was made.)

    Based on what I saw, I'm not at all surprised by the result. While I can't say that it fully explains such a large difference between AVX2 and AVX512, there are at least two things I noticed in the AVX512 binary that would contribute towards it.

    1. There are 64-bit integer multiplies. AVX512 has the vpmullq instruction. AVX2 does not. Emulating this instruction in AVX2 is *extremely* costly.
    2. The ratio of "heavy" to "light" AVX512 instructions is very low. Therefore, the 2nd FMA isn't needed to gain on AVX2.

    I've never analyzed the AVX2 binary itself to see how that 64-bit multiply is being handled. It could be vectorized with extreme overhead, not vectorized at all, or worked-around at an algorithmic level.
  • thetrashcanisfull - Friday, August 2, 2019 - link

    ohhhh... That makes more sense. I assumed that the 3DPM benchmark was doing primarily floating point math. I also didn't realize that AVX2 didn't support packed 64b muls... Thanks for the info!
  • Alexvrb - Friday, August 2, 2019 - link

    "The suggested PL2 for Kaby Lake-R was 44W, so this might indicate a small jump in strategy."

    Yeah, whereby TDP is virtually meaningless and every machine is a complete mystery box until you buy it and discover what actual thermals/power/performance are like - again regardless of the TDP. This is all without overclocking, mind you.

Log in

Don't have an account? Sign up now