Mixed Read/Write Performance

Workloads consisting of a mix of reads and writes can be particularly challenging for flash based SSDs. When a write operation interrupts a string of reads, it will block access to at least one flash chip for a period of time that is substantially longer than a read operation takes. This hurts the latency of any read operations that were waiting on that chip, and with enough write operations throughput can be severely impacted. If the write command triggers an erase operation on one or more flash chips, the traffic jam is many times worse.

The occasional read interrupting a string of write commands doesn't necessarily cause much of a backlog, because writes are usually buffered by the controller anyways. But depending on how much unwritten data the controller is willing to buffer and for how long, a burst of reads could force the drive to begin flushing outstanding writes before they've all been coalesced into optimal sized writes.

This mixed workload test is an extension of what Intel describes in their specifications for the Optane SSD DC P4800X. A total queue depth of 16 is achieved using four worker threads, each performing a mix of random reads and random writes. Instead of just testing a 70% read mixture, the full range from pure reads to pure writes is tested at 10% increments. These tests were conducted on the Optane Memory as a standalone SSD, not in any caching configuration. Client and consumer workloads do consist of a mix of reads and writes, but never at queue depths this high; this test is included primarily for comparison between the two Optane devices.

Mixed Random Read/Write Throughput
Vertical Axis units: IOPS MB/s

At the beginning of the test where the workload is purely random reads, the four drives almost form a geometric progression: the Optane Memory is a little under half as fast as the P4800X and a little under twice as fast as the Samsung 960 EVO, and the MX300 is about a third as fast as the 960 EVO. As the proportion of writes increases, the flash SSDs lose throughput quickly. The Optane Memory declines across the entire test but gradually, ending up at a random write speed around one fourth of its random read speed. The P4800X has enough random write throughput to rebound during the final phases of the test, ending up with a random write throughput almost as high as the random read throughput.

Random Read Latency
Mean Median 99th Percentile 99.999th Percentile

The flash SSDs actually manage to deliver better median latency than the Optane Memory through a portion of the test, after they've shed most of their throughput. For the 99th and 99.999th percentile latencies, the flash SSDs perform much worse once writes are added to the mix, ending up almost 100 times slower than the Optane Memory.

Idle Power Consumption

There are two main ways that a NVMe SSD can save power when idle. The first is through suspending the PCIe link through the Active State Power Management (ASPM) mechanism, analogous to the SATA Link Power Management mechanism. Both define two power saving modes: an intermediate power saving mode with strict wake-up latency requirements (eg. 10µs for SATA "Partial" state) and a deeper state with looser wake-up requirements (eg. 10ms for SATA "Slumber" state). SATA Link Power Management is supported by almost all SSDs and host systems, though it is commonly off by default for desktops. PCIe ASPM support on the other hand is a minefield and it is common to encounter devices that do not implement it or implement it incorrectly, especially among desktops. Forcing PCIe ASPM on for a system that defaults to disabling it may lead to the system locking up.

The NVMe standard also defines a drive power management mechanism that is separate from PCIe link power management. The SSD can define up to 32 different power states and inform the host of the time taken to enter and exit these states. Some of these power states can be operational states where the drive continues to perform I/O with a restricted power budget, while others are non-operational idle states. The host system can either directly set these power states, or it can declare rules for which power states the drive may autonomously transition to after being idle for different lengths of time. NVMe power management including Autonomous Power State Transition (APST) fortunately does not depend on motherboard support the way PCIe ASPM does, so it should eventually reach the same widespread availability that SATA Link Power Management enjoys.

We report two idle power values for each drive: an active idle measurement taken with none of the above power management states engaged, and an idle power measurement with either SATA LPM Slumber state or the lowest-power NVMe non-operational power state, if supported. These tests were conducted on the Optane Memory as a standalone SSD, not in any caching configuration.

Idle Power ConsumptionActive Idle Power Consumption (No LPM)

With no support for NVMe idle power states, the Optane Memory draws the rated 1W at idle while the SATA and flash-based NVMe drives drop to low power states with a tenth of the power draw or less. Even without using low power states, the Crucial MX300 uses a fraction of the power, and the Samsung 960 EVO uses only 150mW more to keep twice as many PCIe lanes connected.

The Optane Memory is a tough sell for anyone concerned with power consumption. In a typical desktop it won't be enough to worry about, but Intel definitely needs to add proper power management to the next iteration of this product.

Sequential Access Performance First Thoughts
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  • Billy Tallis - Monday, April 24, 2017 - link

    I've been considering interactive graphs. I'm not sure how easily our current CMS would let me include external scripts like D3.js, and I definitely want to make sure it provides a usable fallback to a pre-rendered image if the scripts can't load. If you have suggestions for something that might be easy to integrate into my python/matplotlib workflow, shoot me an email.

    And once I get the new 2017 consumer SSD test suite finished, I'll go back to having labeled bar charts for the primary scores, because that's the only easy to compare across a large number of drives.
  • watzupken - Monday, April 24, 2017 - link

    I echo the conclusion that the cache is too little and too late. In a time where SSDs are becoming affordable as compared to the perhaps 5 years back, it makes little sense to fork out so much money for a puny 32gb cache along with other hardware requirements. It's fast, but it is not a full SSD.
  • menting - Monday, April 24, 2017 - link

    It's not aimed at replacing a SSD.
  • Morawka - Monday, April 24, 2017 - link

    has chipworks or anyone else figured out the material science behind this technology?
  • zeeBomb - Tuesday, April 25, 2017 - link

    Damn you guys killed the optane in a day
  • Ryan Smith - Tuesday, April 25, 2017 - link

    As is tradition.

    The manufacturers work hard, but SSD firmware development and validation is hard. There are a lot of drives out there that are better off today because we broke them first.
  • Reflex - Tuesday, April 25, 2017 - link

    http://www.anandtech.com/show/9470/intel-and-micro...

    I think people need to re-read this article. Going over it makes much of the disappointment seem a bit overdone. Intel spoke to the potential of the technology, they didn't promise it all in the first version. They also spoke to its long term potential, including being able to stack the die and potentially move higher bit levels. I think its fair to say this isn't a consumer level product yet, but to ship a brand new memory tech at production level that is significantly faster and higher endurance than alternatives, is a significant accomplishment. We have been suck for more than a decade with a '3-5 year' timetable on new memory technologies, perhaps this will get other players to actually ship something (I'm looking at you HP and your promise of memristers two years ago).
  • Reflex - Tuesday, April 25, 2017 - link

    Also, apparently typing comments at 11PM after a long day at the office isn't the best idea. Ignore my typos please. ;)
  • testbug00 - Tuesday, April 25, 2017 - link

    problem is Intel did not make this clear. Intel has now had multiple chance to clearly seperate the potential of the technology from the first generation implementation. They choose not to take it.

    This is slimey and disgusting.

    The technology as a whole long term does indeed seem very promising, however.
  • Reflex - Tuesday, April 25, 2017 - link

    Couldn't you say that about any company that talks about an upcoming technology and its potential then restricts its launch to specific niches? Which is almost everyone when it comes to new technologies...

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