The AMD Zen and Ryzen 7 Review: A Deep Dive on 1800X, 1700X and 1700
by Ian Cutress on March 2, 2017 9:00 AM ESTExecution, Load/Store, INT and FP Scheduling
The execution of micro-ops get filters into the Integer (INT) and Floating Point (FP) parts of the core, which each have different pipes and execution ports. First up is the Integer pipe which affords a 168-entry register file which forwards into four arithmetic logic units and two address generation units. This allows the core to schedule six micro-ops/cycle, and each execution port has its own 14-entry schedule queue.
The INT unit can work on two branches per cycle, but it should be noted that not all the ALUs are equal. Only two ALUs are capable of branches, one of the ALUs can perform IMUL operations (signed multiply), and only one can do CRC operations. There are other limitations as well, but broadly we are told that the ALUs are symmetric except for a few focused operations. Exactly what operations will be disclosed closer to the launch date.
The INT pipe will keep track of branching instructions with differential checkpoints, to cut down on storing redundant data between branches (saves queue entries and power), but can also perform Move Elimination. This is where a simple mov command between two registers occurs – instead of inflicting a high energy loop around the core to physically move the single instruction, the core adjusts the pointers to the registers instead and essentially applies a new mapping table, which is a lower power operation.
Both INT and FP units have direct access to the retire queue, which is 192-entry and can retire 8 instructions per cycle. In some previous x86 CPU designs, the retire unit was a limiting factor for extracting peak performance, and so having it retire quicker than dispatch should keep the queue relatively empty and not near the limit.
The Load/Store Units are accessible from both AGUs simultaneously, and will support 72 out-of-order loads. Overall, as mentioned before, the core can perform two 16B loads (2x128-bit) and one 16B store per cycle, with the latter relying on a 44-entry Store queue. The TLB buffer for the L2 cache for already decoded addresses is two level here, with the L1 TLB supporting 64-entry at all page sizes and the L2 TLB going for 1.5K-entry with no 1G pages. The TLB and data pipes are split in this design, which relies on tags to determine if the data is in the cache or to start the data prefetch earlier in the pipeline.
The data cache here also has direct access to the main L2 cache at 32 Bytes/cycle, with the 512 KB 8-way L2 cache being private to the core and inclusive. When data resides back in L1 it can be processed back to either the INT or the FP pipes as required.
Moving onto the floating point part of the core, and the first thing to notice is that there are two scheduling queues here. These are listed as ‘schedulable’ and ‘non-schedulable’ queues with lower power operation when certain micro-ops are in play, but also allows the backup queue to sort out parts of the dispatch in advance via the LDCVT. The register file is 160 entry, with direct FP to INT transfers as required, as well as supporting accelerated recovery on flushes (when data is written to a cache further back in the hierarchy to make room).
The FP Unit uses four pipes rather than three on Excavator, and we are told that the latency in Zen is reduced as well for operations (though more information on this will come at a later date). We have two MUL and two ADD in the FP unit, capable of joining to form two 128-bit FMACs, but not one 256-bit AVX. In order to do AVX, the unit will split the operations accordingly. On the counter side each core will have 2 AES units for cryptography as well as decode support for SSE, AVX1/2, SHA and legacy mmx/x87 compliant code.
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Cooe - Sunday, February 28, 2021 - link
Find me these so-called people buying Intel HEDT CPU's (aka OG Ryzen 7's direct competition) for gaming & never for HPC uses.... Oh wait. They don't exist.Haawser - Thursday, March 2, 2017 - link
Yeah, but if you're a gamer who streams, Ryzen is waaaay better than anything Inter offer for $499. Especially if you're gaming at 4K, or going to be. Different people have different needs, even gamers.Jimster480 - Thursday, March 2, 2017 - link
Yes but no,Because Broadwell-E and Haswell-E HEDT platforms are in the same boat as Ryzen.
But this is what this Ryzen 7 release is meant to do.
Compete with the HEDT platforms, not against the "APU" chips.
Those chips will come later, albeit with much higher clockspeeds to compete with intel.
For now you have Intel with 10-20% clockspeed advantages in clockspeed dependent applications.
Meteor2 - Saturday, March 4, 2017 - link
I hope you're right but there's no indication they will be clocked higher. AMD has access to processes which are generation behind Intel's, at least for a couple of years. We can't expect miracles.nos024 - Thursday, March 2, 2017 - link
Lol, butt hurt? Why even bother running gaming benchmarks? You even said it yourself that ryzen wont make it to your so called grown-up workstation because if low pcie count.So tell me who is this $500 Ryzen chip designed for? Not grown ups running workstation, or pathetic kiddies gamers...so theyre for Wannabes?
Tunnah - Thursday, March 2, 2017 - link
He literally said it is ideal to replace his aging 3770k, he gave an example of how it will be used. Try more reading and less being a turdddriver - Thursday, March 2, 2017 - link
Ryzen is that much more affordable that with the price difference I could have built another whole system, dedicated to running the 2 HBA adapters, thus saving on the need of 16 lanes. 40 - 16 is exactly 24, which is what ryzen has. If it was available a year ago I would have simply built two systems, offering a good 50-60% more CPU performance, double the GPU performance, with enough need to accommodate my IO needs, even if between two systems, that wouldn't have been much of an issue.The pci lane count is lower than intel E series chips, however it is still 50% higher than what you can get from intel outside the E series. It will actually suffice in most workstation scenarios, even if you end up running graphics at x8, which is not really a big deal.
ddriver - Thursday, March 2, 2017 - link
"you even said it yourself that ryzen wont make it to your so called grown-up workstation because if low pcie count"I did not say that. Not all workstations require 40 pcie lanes. Most could do with 24. I was talking about my workstation in particular, which has plenty of pcie hardware. For the vast majority of HPC scenarios that would not be necessary, furthermore as already mentioned, with the saved money you can build additional systems dedicated to specific tasks, offloading both the need of more pcie lanes and the cpu time the attached hardware consumes.
It remains to be seen how much IO will the server zen parts have. Ryzen is not particularly a workstation grade chip, it just happens to be GOOD ENOUGH to do the job. AMD give you 50% more performance and 50% more IO at the same or better price point, and I think they will do the same for the chips they actually design for workstation.
It looks like the 16 core workstation chip will have 64 pcie lanes, and the 32 core - a whooping 128 lanes. So intel E series looks like a sad little orphan with its modest 40 lanes... And no, xeons aren't much better, they are in fact worse, the 24 core E7-8894 v4 only has a modest 32 lanes.
So no, while I will not be replacing my main 10 core workstation with a ryzen, because that would win me nothing, I am definitely looking forward to replacing it next year with a Naples system, and I definitely wished ryzen was available last year as I could have spent my money much better than buying intel.
Intel999 - Thursday, March 2, 2017 - link
"So tell me who is this $500 Ryzen chip designed for?"Logic would imply it is aimed at anyone that works in an environment where they need superior multithreading performance. For instance, anyone that has bought a 6900k or 6950k, but more importantly it is for those individuals that "wanted" to buy either of Intel's multi core champs but couldn't due to ridiculous prices.
I'd dare to make a bet there are more people that wanted to buy a 6900k than there are people that actually did. Now they can buy one and still put food on the table this month.
FriendlyUser - Thursday, March 2, 2017 - link
Exactly right. I was always tempted by the 6850K, but the price of the CPU+platform was simply ridiculous. For much less I got a faster CPU and a high-end MB. I won't miss the 40PCIe lanes.