SiFive

GlobalFoundries and SiFive announced on Tuesday that they will be co-developing an implementation of HBM2E memory for GloFo's 12LP and 12LP+ FinFET process technologies. The IP package will enable SoC designers to quickly integrate HBM2E support into designs for chips that need significant amounts of bandwidth. The HBM2E implementation by GlobalFoundries and SiFive includes the 2.5D packaging (interposer) designed by GF, with the HBM2E interface developed by SiFive. In addition to HBM2E technology, licensees of SiFive also gain access to the company’s RISC-V portfolio and DesignShare IP ecosystem for GlobalFoundries’ 12LP/12LP+, which will enable SoC developers to build RISC-V-based devices GloFo's advanced fab technology. GlobalFoundries and SiFive suggest that the 12LP+ manufacturing process and the HBM2E implementation will be primarily used for artificial intelligence training and...

SiFive Announces First RISC-V OoO CPU Core: The U8-Series Processor IP

In the last few year’s we’ve seen an increasing amount of talk about RISC-V and it becoming real competitor to the Arm in the embedded market. Indeed, we’ve seen...

71 by Andrei Frumusanu on 10/30/2019

SiFive Acquires USB 2.0 and 3.x IP Portfolio to Strengthen RISC-V SoCs

SiFive, one of the world’s leading developers of controllers and SoCs based on the RISC-V instruction set, has acquired USB IP portfolio from Innovative Logic, a silicon IP designer...

7 by Anton Shilov on 5/23/2019

SiFive Unveils Freedom Platforms for RISC-V-Based Semi-Custom Chips

SiFive, a company established by researchers who invented the RISC-V instruction set architecture in the University of California Berkeley several years ago, has this week announced two platforms which...

9 by Anton Shilov on 7/18/2016

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