Better late than never

It's been almost two years since Intel has been in the volume DP server chipset market and a lot of that has to do with their chipset strategy that was introduced late in 1999. Rewinding to the release of the first 0.18-micron Coppermine core based Pentium III processors, the only Intel chipset that supported the 133MHz FSB CPUs was the doomed i820.

In fact, with the exception of their entry-level i810 line, none of Intel's current generation chipsets at the time had support for memory technologies other than RDRAM. By banking on a quick adaptation of RDRAM which would drive market prices lower, Intel designed their entire chipset line - from desktop to server - around RDRAM based chipsets. Even the Timna project was designed to use RDRAM which partially led to its demise (luckily Banias is slowly shaping up to be an even more formidable entry into that market).

With no high-bandwidth SDRAM platform ready to feed the volume chipset market, Intel had to rely on ServerWorks to supply chipsets for the workstation and server markets while VIA carried the desktop market until the i815 was ready. The reason RDRAM was such a pain to deal with on the server side of things was because of the memory size requirements of many high-end servers. With the introductory prices of RDRAM coming in at close to $1000 for 128MB, outfitting a server farm with 4 - 16GB of memory a piece would easily become financially impossible for most IT departments (even in the IT market of 1999 - 2000). For almost the first year of RDRAM's introduction to the x86 market its pricing was still 3x or more than that of SDRAM, thus making it a no-go for the server market.

As our recent article attempted to explain, Intel's lengthy validation process kept them from just popping out a DDR SDRAM solution. Not only did DDR SDRAM have to go through an incredible amount of validation, but Intel's DDR SDRAM chipsets had to do the same. The release of the i845 with DDR support obviously sped things up quite a bit as now Intel had a fully functional and validated DDR memory controller. And now, the E7500 chipset is the result of even more strenuous validation in multiprocessor configurations.

Index The Chipset
Comments Locked


View All Comments

Log in

Don't have an account? Sign up now