AMD’s Big Bet on ARM Powered Servers: Opteron A1100 Revealedby Stephen Barrett on August 11, 2014 12:00 PM EST
AMD’s Special Sauce: A1100’s Co-Processors
This year, AMD has answered some critics of their business by describing their plans to regain a differentiated position on the market. One of the key slides AMD used to described its position showed ARM, GPU, and x86 cores at the center surrounded by complementary IP.
AMD’s argument is it is uniquely positioned as the only chip company with powerful graphics, ARM and x86 CPU designs, a server heritage including security and fabric (thanks SeaMicro), as well as extensive chip packaging, motherboard and server design expertise.
The complementary IP AMD brings to the A1100 is two Co-Processors. The Cryptographic CoProcessor (CCP) and the System Control Processor (SCP).
While the Cortex A57s include cryptographic instructions courtesy of the ARMv8 ISA, there are times when a server has significant cryptographic load and it is better to offload that to a coprocessor than service it directly on the CPU core. Cryptographic transactions such as https are well suited for the CPU core as they require low latency and the overhead to offload the work often negates the acceleration the coprocessor provides. However, cryptographic transactions such as archive compression/decompression and large data set encryption/decryption can benefit tremendously.
Utilizing the coprocessor requires operating system awareness to redirect cryptography functions to the dedicated hardware instead of doing them with the general purpose hardware. For example, requesting a random number from the OS would ideally fetch it from the CCP. AMD has already committed an update to the Linux 3.14 kernel to support this.
The SCP is based around an ARM Cortex-A5 processor and is effectively an SoC itself inside the A1100 SoC. The rest of the A1100 communicates to the SCP as if it is an IO device. This seems weird, but the isolation is by design. There are two reasons for this: Out-of-band management, and secure processing with ARM TrustZone technology.
Out-of-band management is a technique used in industry for servicing and diagnosing deployed systems regardless of the state of its normal operation or ‘in-band’ components. The SCP has its own dedicated 10/100/100 Ethernet connection, RAM, ROM, and IO connectivity. Connecting from a management interface, a user can read and configure motherboard devices like temperature sensors, power supplies, and fans completely independent from the rest of the A1100 SoC’s activities. Since the SCP is also core to the boot process, server administrators can also reset servers remotely.
One of the other reasons the SCP exists it to implement ARM's TrustZone technology. AMD announced two years ago they would be partnering with ARM to implement TrustZone technology into future CPUs, and this is the first server CPU to receive the feature. This processor is actually already present in AMD’s x86s APUs. To recap, TrustZone is an ARM technology providing a ‘secure world’ inside the SoC. Programming routines requiring utmost security, like digital rights management, can execute inside the SCP and are protected from unauthorized access from the ‘normal world’. These features are typically found in consumer devices, as certain applications like Netflix require a secure processing path to play HD content. AMD likely reused their TrustZone processor design from consumer APUs to implement the SCP, and it will be interesting to see how server software takes advantage of it.