Socket-A Chipset Roundup - August 2001

Memory Bandwidth - Sandra 2001

Since its much better to know why something performs the way it does than just knowing how well it performs, we kick off our benchmarks with some low level memory tests.  These are designed to stress the memory controller and the FSB interface of the platform.  Since the CPU is kept constant, the only variables here are the memory type and the North Bridge itself, making these tests a perfect gauge of what to expect.

The STREAM tests in Sandra 2001 are quite useful in getting an idea of real world peak memory bandwidth figures.  Keeping in mind that very few applications actually demand this much memory bandwidth, let’s look at what the platforms can do.

It is widely known that most implementations of integer code occur in situations where the operating datasets are not very large at all.  This reduces the dependency on high bandwidth memory solutions when dealing with most integer applications.  In the Integer-STREAM test, the SiS 735 takes an early lead with nearly a 10% bandwidth advantage over the AMD 760 chipset.  Keep in mind that both platforms were using PC2100/DDR266 SDRAM.

Take note of the poor bandwidth score from the VIA KT266 platform compared to its older PC133 brother, the KT133A.  We’ll explain that shortly…

Floating Point code on the other hand is generally associated with higher bandwidth datasets, increasing memory bandwidth dependency.  In order to properly simulate this, a more stressful test is used by Sandra 2001 to generate the FP-STREAM scores.  Here the 735’s advantage is cut slightly to 6.5%. 

More noticeable is the KT266 that is able to distance itself from both of the PC133 SDRAM platforms.  In situations where bandwidth is critical (for example, bandwidth intensive floating point applications), the DDR platforms are clearly ahead of their SDR counterparts; on the other hand as we noticed in the Int-STREAM test, in the absence of heavy bandwidth usage DDR SDRAM does not necessarily prevail.