The Evolution of IDE

The IDE or Integrated Drive Electronics interface was developed back in 1988 and was actually an attempt to consolidate all of the different non-SCSI drives at the time to a standard interface. Before that time, many manufacturers loosely followed the designs of CDC interfaces, but they often made proprietary changes that made compatibility difficult. The industry, knowing they needed a standardized interface, formed what is known as the Common Access Method Committee (CAMC), and formulated the specifications for the AT Attachment or ATA standard. In those early days, the ATA interface referred to the controller where IDE referred to the actual drive. This was because there were two other proposed standards at the time, the XT IDE and the MCA IDE standard, both of which never gained industry-wide support. Due to the ATA IDE specification gaining popularity, the other two interfaces quickly died out, and thus, today, the terms ATA and IDE have become loosely interchangeable.

The original AT Attachment (ATA) specification, set forth much of the foundation for today’s Ultra ATA/66 standard. The standard calls for a 4-pin Molex power connector, which supplies +5V dc, +12V dc and ground to the drive, and a 40-pin data/control signal cable. Also, each IDE channel can support 2 devices in a master slave configuration. Although this configuration set the basics for the standard, the design has changed slightly with each new revision, mainly with the actual signal designations on the IDE cable. Note that the original ATA specifications could support 2 devices, or one channel, the later EIDE specification increased support for up to 4 devices, or two channels. Also note that while the Ultra ATA/66 specifications calls for a 80 pin IDE cable, only 40 pins are actually used for data and control signals, the second set of 40 pins are paired with the originals and act as ground wires.

Let’s take a look at some of the major revisions of the ATA standard over the years and look at some of the more important changes that directly relate to performance. The following chart lists the PIO (Programmed I/O Modes), the interface they were used with, and the maximum transfer speeds each mode supported.



Cycle Time

Transfer Rate

PIO Mode 0


600 ns

3.3 MB/sec

PIO Mode 1


383 ns

5.2 MB/sec

PIO Mode 2


240 ns

8.3 MB/sec

PIO Mode 3


180 ns

11.1 MB/sec

PIO Mode 4


120 ns

16.6 MB/sec

Ultra DMA 33

Ultra ATA

60 ns

33 MB/sec

Ultra DMA 66

Ultra ATA66

30 ns

66 MB/sec

In the above chart, beginning with PIO Mode 3, there was also support for DMA (Direct Memory Access) transfer modes. DMA could be in the form of ordinary DMA that relies on the motherboards controller (hardware), or Bus Mastering DMA, which relies on Logic within the controller (software). So with PIO Mode 3 you could also use DMA Mode 1 if your motherboard or controller supported it, and with PIO Mode 4 you could use DMA Mode 2. Ultra DMA 33 and Ultra DMA 66 can also be called DMA Mode 3 and DMA Mode 4, respectively, but they are commonly referred to as Ultra DMA 33 or 66, or just Ultra ATA, Ultra ATA/33 or Ultra ATA/66.

Note also the cycle times in the above chart. These times signify the amount of time in which the data has to travel to or from the drive. Since the IDE cable uses 16 wires for data, or is 16 bits wide, PIO Mode 0 can transfer 16 bits of data once every 600 ns. To go into a bit more detail here, a nanosecond (ns) is 1/1,000,000,000 or 0.000000001 of a second, so 600 ns is 0.0000006 of a second. Doing a bit of multiplication we find that 2 Bytes (16 bits) of data is being sent at every 0.0000006 of a second, or 1 byte per 0.0000003 of a second. Taking the inverse of this, or 1 / 0.0000003, we come up with our theoretical maximum transfer rate of 3,333,333.33 Bytes per second or more commonly 3.3 MB/sec (using 1 MB = 1,000,000 Bytes). Using this same formula you can see how the maximum transfer rates of the various modes are determined.

Remember that the cycle times call for the maximum amount of time 2 bytes of data have to be transmitted from the drive to the controller, and that the maximum transfer rate is simply derived from assuming that data is being constantly transmitted. This is often where confusion sets in, as sometimes there are pauses between data transmissions, as it is rare you need 66 MB of data at once, or the drive itself pauses as it seeks the information on an adjoining track. Thus seeing actual transfers of 66 MB/sec are rare, or even impossible on modern IDE hard drives.

Index Ultra ATA/66
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