The Skylake CPU Architecture

As with any new Intel architecture, the devil is in the details. Previously at AnandTech we have been able to provide deep dives into what exactly is going on in the belly of the beast, although the launch of Skylake has posed a fair share of problems.

Nominally we rely on a certain amount of openness from the processor/SoC manufacturer in providing low level details that we can verify and/or explain. In the past, this information has typically been provided in advance of the launch by way of several meetings/consultations with discussions talking to the engineers. There are some things we can probe, but others are like a black box. The black box nature of some elements, such as Qualcomm’s Adreno graphics, means that it will remain a mystery until Pandora’s box is opened.

In the lead up to the launch of Intel’s Skylake platform, architecture details have been both thin on the ground and thin in the air, even when it comes down to fundamental details about the EU counts of the integrated graphics, or explanations regarding the change in processor naming scheme. In almost all circumstances, we’ve been told to wait until Intel’s Developer Forum in mid-August for the main reason that the launch today is not the full stack Skylake launch, which will take place later in the quarter. Both Ryan and I will be at IDF taking fastidious notes and asking questions for everyone, but at this point in time a good portion of our analysis comes from information provided by sources other than Intel, and while we trust it, we can't fully verify it as we normally would.

As a result, the details on the following few pages have been formed through investigation, discussion and collaboration outside the normal channels, and may be updated as more information is discovered or confirmed. Some of this information is mirrored in our other coverage in order to offer a complete picture in each article as well. After IDF we plan to put together a more detailed architecture piece as a fundamental block in analyzing our end results.

The CPU

As bad as it sounds, the best image of the underlying processor architecture is the block diagram:

From a CPU connectivity standpoint, we discussed the DDR3L/DDR4 dual memory controller design on the previous page so we won’t go over it again here. On the PCI-Express Graphics allocation side, the Skylake processors will have sixteen PCIe 3.0 lanes to use for directly attached devices to the processor, similar to Intel's previous generation processors. These can be split into a single PCIe 3.0 x16, x8/x8 or x8/x4/x4 with basic motherboard design. (Note that this is different to early reports of Skylake having 20 PCIe 3.0 lanes for GPUs. It does not.)

With this, SLI will work up to x8/x8. If a motherboard supports x8/x4/x4 and a PCIe card is placed into that bottom slot, SLI will not work because only one GPU will have eight lanes. NVIDIA requires a minimum of PCIe x8 in order to enable SLI. Crossfire has no such limitation, which makes the possible configurations interesting. Below we discuss that the chipset has 20 (!) PCIe 3.0 lanes to use in five sets of four lanes, and these could be used for graphics cards as well. That means a motherboard can support x8/x8 from the CPU and PCIe 3.0 x4 from the chipset and end up with either dual-SLI or tri-CFX enabled when all the slots are populated.

DMI 3.0

The processor is connected to the chipset by the four-lane DMI 3.0 interface. The DMI 3.0 protocol is an upgrade over the previous generation which used DMI 2.0 – this upgrade boosts the speed from 5.0 GT/s (2GB/sec) to 8.0 GT/s (~3.93GB/sec), essentially upgrading DMI from PCIe 2 to PCIe 3, but requires the motherboard traces between the CPU and chipset to be shorter (7 inches rather than 8 inches) in order to maintain signal speed and integrity. This also allows one of the biggest upgrades to the system, chipset connectivity, as shown below in the HSIO section.

CPU Power Arrangements

Moving on to power arrangements, with Skylake the situation changes as compared to Haswell. Prior to Haswell, voltage regulation was performed by the motherboard and the right voltages were then put into the processor. This was deemed inefficient for power consumption, and for the Haswell/Broadwell processors Intel decided to create a fully integrated voltage regulator (FIVR) in order to reduce motherboard cost and reduce power consumption. This had an unintended side-effect – while it was more efficient (good for mobile platforms), it also acted as a source of heat generation inside the CPU with high frequencies. As a result, overclocking was limited by temperatures and the quality of the FIVR led to a large variation in results. For Skylake on the desktop, the voltage regulation is moved back into the hands of the motherboard manufacturers. This should allow for cooler processors depending on how the silicon works, but it will result in slightly more expensive motherboards.

A slight indication of this will be that some motherboards will go back to having a large amount of multiplexed phases on the motherboard, and it will allow some manufacturers to use this as a differentiating point, although the usefulness of such a design is sometimes questionable.

Also Launching Today: Z170 Motherboards, Dual Channel DDR4 Kits Skylake's iGPU: Intel Gen9
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  • taltamir - Friday, October 23, 2015 - link

    Recognizing reality as it is, and being willing to admit that AMD is a joke, does not make someone an intel fanboy nor does it mean they want intel to win and AMD to fold. Reply
  • Samus - Wednesday, August 5, 2015 - link

    This launch and the performance of skylake over haswell/broadwell is entirely unexpected because it is wholly unnecessary. The ipc improvement is upward of 10% in some cases, when normally it has been 4-6% in the past. It's amazing that the ipc improvement over nehalem is almost 50% while using nearly half the power. They are finally progressing after dogging along since sandybridge Reply
  • ptmmac - Saturday, August 8, 2015 - link

    Intel has been turning a double decked supertanker to catch mobile chips on dozens of smaller platforms. Notably Apple is riding on a trialled super yacht and is leading the pack. The real,race going on right now is who will build the first photonics based chip and actually make money selling it. Intel is in that race, but we don't really have much data as to who will take the lead there. The real race is heading towards where the puck will be in 10 years. This is like watching Americas cup in the 50's. It is not important to the average person. Reply
  • Jaybus - Monday, August 10, 2015 - link

    Expect hybrid chips first. These will have photonic i/o with electronic cores. This will allow an inter-chip [serial] bus at core-clock speeds, drastically reducing the need for on-chip caching and replacing 64 (or more) traces from CPU to DRAM with a single optical trace. L3 (maybe L2) could likely be eliminated, freeing up real estate and reducing power. Essentially, it allows using DRAM modules, peripheral chips, and even GPUs and other CPUs as if they were all on-chip. Actual photonic cores would come later, perhaps much later. Reply
  • CaedenV - Wednesday, August 5, 2015 - link

    And we would all buy that processor rather than eternally waiting in purgatory. I really hope AMD puts out something amazing, even if I am not going to buy it. Reply
  • TheGladiator2212 - Friday, October 16, 2020 - link

    Yup...
    This comment aged badly
    Reply
  • prisonerX - Thursday, August 6, 2015 - link

    I think the funniest thing is how people bag AMD and praise Intel while paying through the nose for CPUs that are marginally faster (or marginally slower) than last generation.

    It's especially funny since Intel is selling its hottest chips (TDP wise, compared to other CPUs it makes) to the "mainstream" while wasting a huge % of the die on a useless integrated GPU that no-one who is willing to pay actually uses.

    I always buy AMD because I support competition, it gives me much better value for my money, provides more balanced and batter matched performance and because I'm not a child I have no need for bragging rights about the singe threaded performance of my CPU that I don't need.
    Reply
  • D. Lister - Thursday, August 6, 2015 - link

    "I always buy AMD because I support competition, it gives me much better value for my money, provides more balanced and batter matched performance and because I'm not a child I have no need for bragging rights about the singe threaded performance of my CPU that I don't need."

    That's right... children brag about single-thread performance (was there anyone in this section actually doing that though?). Adults, on the other hand apparently, brag about several things simultaneously, like the better performance per dollar of their purchase, and having a superior sense of maturity, morality, economics and technology.

    You sir, are duly nominated for the AnandTech comment section's esteemed "Irony of The Month" award for August '15... bravo!
    Reply
  • Eugene86 - Thursday, August 6, 2015 - link

    Well he's gotta justify that purchase decision to himself somehow... Reply
  • MapRef41N93W - Friday, August 7, 2015 - link

    Intel users don't have to brag about single threaded performance. Intel CPUs destroy AMD in multi-threaded as well..... Reply

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