The ARM vs x86 Wars Have Begun: In-Depth Power Analysis of Atom, Krait & Cortex A15
by Anand Lal Shimpi on January 4, 2013 7:32 AM EST- Posted in
- Tablets
- Intel
- Samsung
- Arm
- Cortex A15
- Smartphones
- Mobile
- SoCs
Krait: WebXPRT 2013 Community Preview 1
I also included Principled Technologies' new HTML5/js web test suite WebXPRT in our power analysis. Intel and Qualcomm remain quite close in these tests. I didn't run the Qualcomm tests at the same time as the Intel tests the charts graphs aren't perfectly aligned, as a result it looks like Intel took longer to complete the test when in reality the opposite is true. Once again at the platform level, the W510 beats the XPS 10, but at the CPU level Krait manages to do better than Atom. Looking at GPU power consumption alone, Intel/Imagination are once again more power efficient. As 3D performance doesn't matter much here, the Qualcomm/Adreno 225 3D performance advantage does nothing - it just costs more power.
Once again there's no contest when we include Tegra 3 in the comparison. Atom/Krait are in a different league. It'll be interesting to see how Tegra 4 will do here...
TouchXPRT 2013
As our first native client test, we turned to PT's TouchXPRT 2013. As there is no "run-all" functionality in the TouchXPRT benchmark, we had to present individual power curves for each benchmark. Unlike the previous tests where Qualcomm was consistently slower than Intel, many of the TouchXPRT tests show the two competitors performing quite similarly. This gives us a better idea of how these two fare when performance is equal. For the most part, Acer/Intel seem to win at the platform and GPU levels, while Qualcomm takes the win at the CPU level. Once again, it's not abundantly clear to me how much of Qualcomm's CPU core power advantage is due to the fact that we're not taking into account power consumption of the L2 cache.
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A5 - Friday, January 4, 2013 - link
Even if you just look at the Sunspider (which draws nothing on the screen) power draw, it's pretty clear that the A15 draws more power. There have been a ton of OEMs complaining about A15's power draw, too.madmilk - Friday, January 4, 2013 - link
Since when did screen resolution matter for CPU power consumption on CPU benchmarks? Platform power might change, yes, but this doesn't invalidate many facts like Cortex-A15 using twice as much power on average compared to Krait, Atom or Cortex-A9.Wolfpup - Friday, January 4, 2013 - link
Good lord. Do you have some evidence for any of this? If neither Windows nor Android is the "right platform" for ARM, then...are you waiting for Blackberry benchmarks? That's a whole lot of spin you're doing, presumably to fit the data to your preconceived "ARM IS BETTER!" faith.Veteranv2 - Friday, January 4, 2013 - link
Hahaha, the Nexus 10 has almost 4 times the pixels of the Atom.And the conclusion is it draws more power in benchmarks? Of course, those pixels aren't going to fill itself. Way to make conclusion.
How big was that Intel PR cheque?
iwod - Saturday, January 5, 2013 - link
While i wouldn't say it was a Intel PR, I think they should definitely have left the system level power usage out of the questions. There is no point telling me that a 100" Screen with ARM is using X amount of power compared to 1" Screen with Haswell.It is confusing.
But they did include CPU and GPU benchmarks. So saying it is Intel PR is just trolling.
AlB80 - Friday, January 4, 2013 - link
Architectures with variable length of instruction are doomed. Actually there is only one remains. x86.Intel made the step into a happy past when CISC has an advantage over RISC, when superscalarity was just a theory.
Cortex A57 is coming. ARM cores will easily outperform Atom by effective instruction rate with minimum overhead.
Wolfpup - Friday, January 4, 2013 - link
How is x86 doomed when it has an absolute stranglehold on real PCs, and is now competitive on ultramobile platforms?The only disadvantage it holds is the need for a larger decoder on the front end, which has been proportionally shrinking since 1995.
djgandy - Friday, January 4, 2013 - link
plus effing one!I think some people heard their uni lecturers say something once in 1999 and just keep repeating it as if it is still true!
AlB80 - Friday, January 4, 2013 - link
Shrinking decoder... nice myth. Of course complicated scheduler and ALU dozen impact on performance, but do not forget how decoded instruction queues are filled. Decoder is only one real difference.1. There is fundamental limits how many variable instructions can be decoded per clock. CISC has an instruction cross-interference at the decoder stage. One logical block should determine a total length of decoded instructions.
2. There is a trick when CISC decoder is disintegrated into 2-3 parts with dedicated inputs, so its looks like a few independent decoders, but each part can not decode any instruction.
Now compare it with RISC.
And as I said, what happens when Cortex can decode 4,5,6,7,8 instructions?
Kogies - Friday, January 4, 2013 - link
Don't be so quick to prophesy the death of a' that. What happens when a Cortex decodes 8 instructions... I don't know, it uses 8W?Also, didn't Apple choose CISC (Intel) chips over RISC (PowerPC)? Interestingly, I believe Apple made the switch to Intel because the PowerPC chips had too high a power premium for mobile computers.