Understanding TLC NAND
by Kristian Vättö on February 23, 2012 1:14 PM EST- Posted in
- Storage
- SSDs
- OCZ
- Indilinx Everest
- TLC
Our thoughts are a bit mixed. On the one hand, cheaper SSDs are exactly what consumers want. The performance is still there compared to hard drives, no matter what NAND is used. If you go to an Apple Store today and try out MacBook Air and Mac Pro, the MacBook Air will often feel faster, even though it's the slower Mac in terms of processing power. This is solely due to the presence of an SSD. An SSD can bring new life to a computer that is otherwise considered obsolete. That's why we think everyone would want an SSD, but it's understandable that the masses won't adopt SSDs until the price and capacities are reasonable. This is definitely where TLC shines—it provides us with noticeably cheaper SSDs, possibly cheap enough for the masses to adopt (e.g. well under $1 per GB).
On the other hand, we're concerned that the cut in prices is done at the expense of endurance. One advantage often heard about buying an SSD is that SSDs are a lot more reliable than hard drives. In terms of P/E cycles, that is probably true with current MLC NAND. However, there have been quite a few widespread firmware issues, such as SF-2281 BSOD and Intel 320 Series 8MB bugs. Those have been fixed, and we may finally be looking at SSDs which have good performance, adequate endurance, and are more or less trouble-free. However, TLC will require new controller logic, and new logic may result in additional firmware issues.
The earliest SSDs lacked performance, even though they were faster than most hard drives, especially in seek times. In just a few years, performance has increased exponentially, maybe even to a point where the average user won't notice the difference between the fastest SSD and a mediocre SSD.
Given the desire for performance, reliability, and cost, TLC NAND may take away one from the triplet: endurance. Notice we said "may", because P/E cycles aren't everything. It has been claimed that algorithms to minimize write amplification will follow Moore's Law, just like NAND does. In other words, every time there is a die shrink, wear leveling has been improved in order to keep endurance the same. On top of that, improvements in manufacturing technologies can keep the P/E count up as well. 20nm IMFT MLC is claimed to have 3000-5000 P/E cycles, just like 25nm IMFT MLC.
The good news is, MLC NAND will stay in production and hence MLC NAND based SSDs are not going anywhere. What TLC will provide is freedom of choice. If you use your computer for checking email and browsing the Internet, no doubt a TLC based SSD will be sufficient. For the majority of consumers, TLC SSDs should meet their demands.
In addition, the SSD market is evolving quickly; if you buy the best SSD today, it won't be the best for very long. Let's say that it lasts you for four years. In that time, the SSD market will change a lot—four years ago, we were looking at 16GB SSDs for nearly $600! By the time a typical SSD is ready for replacement, you will be looking at much faster SSD with more capacity, and likely for a lower price. In 4.5 years, we have gone from that 16GB offering with performance that often trailed behind contemporary HDDs to 120GB SSDs that are up to a couple orders of magnitude faster than HDDs on random access patterns (and still several times faster for sequential tranfers), all for a starting price of around $170. If that pattern holds for the next four years, we'll be looking at ~1TB SSDs in four years that offer transfer rates that would saturate multi-lane PCIe interfaces at even lower prices. While we expect the rate of progress to be quite a bit slower over the next four years, there's still plenty of room for improvements in SSD technology.
As far as TLC-based SSDs are concerned, all we can do now is to wait for the first product announcements to come. Once we get some review samples, we'll be sure to put them through our SSD test suite and see how they stack up to existing drives.
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Kristian Vättö - Saturday, February 25, 2012 - link
I just used the names that manufacturers use. If you look at e.g. Micron's part catalog (linked below), they use SLC, MLC and TLC. I agree that the naming is misleading because MLC should refer to any NAND with multiple bits per cell. TLC is sometimes called as 3-bit-per-cell MLC or just MLC-3 but the TLC name is gaining more momentum all the time.http://www.micron.com/products/nand-flash/mass-sto...
foolsgambit11 - Sunday, February 26, 2012 - link
Thanks.Taracta - Sunday, February 26, 2012 - link
Shouldn't the TLC be 64Gb? It holds twice as much information as MLC as MLC hold twice as much as SLC. Each increment in bits doubles the information stored as stated in the article, SLC 2bits stored, MLC 4bits stored and TLC 8bits (1 BYTE) stored.Taracta - Sunday, February 26, 2012 - link
You are dealing with base-2 values. Each additional bit doubles the amount of data that is stored. You even have the correct values in the begining of the article. SLC stores 2 bitsof information 0 and 1, MLC stores 4 bits of information 00, 01, 10, 11 and TLC store 8 bits (1 BYTE) of information 000, 001, 010, 011, 100, 101, 110, 111 yet further down in the article you are stating that TLC stores only a third more that of SLC. You are confusing the bit place holder with the actual information that is being stored. TLC has an additional bit place holder compared to MLC which has an additional bit place holder compared to SLC. Each bit place holder increases the storage capability by a power of two (2).Kristian Vättö - Sunday, February 26, 2012 - link
SLC stores 1-bit per cell/transistor and the value can be either 0 or 1. It cannot be 0 and 1 at the same time.MLC stores 2-bits cell. This means the value can be either 00, 01, 10, or 11. However, it can only be programmed to have one value. One MLC cell cannot store e.g. 00 and 01 at the same time. One 0 or 1 is one bit of data, i.e. 00 is two bits of data. I don't know how you are coming up with four bits, maybe you are mixing it with the voltage states (each value needs its own voltage state so when you program a cell to e.g. 00, it will be read as 00).
TLC just increases the bits per cell to three which means the possible values are 000, 001, 010, 100, 011, 110 101, and 111. Again, eight voltage states and three bits per cell.
Each additional bit per cell increases the voltage states by a power of 2 (in math terms: 2^n, where n is the amount of bits per cell). Amount of bits per cell is just n, it's not a power of two. MLC is 2*1=2, and 2 is 100% bigger than 1. TLC is 3*1=3. and 3 is 200% bigger than 1 but only 50% more than 2.
Taracta - Sunday, February 26, 2012 - link
Ok let me make it simple because I still think you are confusing yourself.SLC possible values are 0 or 1 which is equal to 2 values with is 2^1
MLC possible values are 0, 1, 10 or 11 which is equal to 4 values which is 2^2
TLC possible values are 0, 1, 10, 11, 100, 101, 110 or 111 which is equal to 8 values which is 2^3
Therefore each TLC which stores 8 values (3bits) which is twice that of a MLC which stores 4 values (2bits) which is twice that of a SLC which stores 2 values (1bit)
Is this right?
KitsuneKnight - Sunday, February 26, 2012 - link
He's not confusing himself, you're confused about binary numbers and bits."Therefore each TLC which stores 8 values (3bits) which is twice that of a MLC which stores 4 values (2bits) which is twice that of a SLC which stores 2 values (1bit)"
Don't confuse the amount of bits of storage, with the maximum value it can hold.
Since you seem to be getting confused with binary numbers, lets work with decimals numbers for a bit.
Lets say an 'SLC' can represent the values 0-9. An MLC can represent the values 0-9, 0-9 or 00-99 (that's two sets of 0-9 next to each other!). A TLC can represent the values 0-9,0-9,0-9 or 000-999. It should be patently obvious that an TLC doesn't have 100 times the capcity of an SLC cell! A /single one/ can hold a VALUE 100 times, but, 3 SLCs next to each other could hold the same value.
A linear growth of bits results in an /exponential/ growth of the value those bits, when combined, can represent. It doesn't matter if all those bits are from a single cell, or X number of cells. How you get bits doesn't matter.
Taracta - Monday, February 27, 2012 - link
Kristian,Did some research to see where you were coming from with the data you presented.
http://cseweb.ucsd.edu/users/swanson/papers/ICNC20...
gives some insight on TLC block sizes and why is doesn't follow the actual size of a TLC cell. Basically some pages and not use in TLC block configurations. Strangely the amount of pages in a TLC block is more than double that of a MLC block!
I leave it up to you to clarify the article as it is somewhat confusing and needs some explanation of the differences between the cell, page and block sizes for TLC.
Kristian Vättö - Monday, February 27, 2012 - link
Actually, TLC block size does (or at least should) follow the bits-per-cell idea. 25nm IMFT MLC NAND brought us 8KB pages and 256 pages per block. According to your link, TLC has 384 pages per block (i.e. 3*128 which means 128 pages per bit). MLC is now using that same 128 pages per bit idea (before it was 64 pages per bit).It's possible that TLC moved to a bigger block size before MLC and SLC because that lowers the cost and ultimately TLC is all about cost. There is need for less peripheral circuits between the blocks, which makes the die smaller and hence reduces production costs.
http://www.micron.com/~/media/Documents/Products/T...
http://www.anandtech.com/show/2928
I don't know what this has to do with your original point about the article being wrong, though. Of course, I'm happy to answer any questions regarding TLC, or at least give it a try (I haven't studied NAND technology in a university so e.g. that math stuff in your link is over my head).
mdshann - Monday, March 5, 2012 - link
I haven't seen a 500 GB hard drive for anywhere near $50 in about 6 months now... where are you getting these drives? Right now the cheapest 500 GB drive on newegg.com is $84.99 and it's a bare Hitachi.