Intel's Ivy Bridge Architecture Exposedby Anand Lal Shimpi on September 17, 2011 2:00 AM EST
- Posted in
- Ivy Bridge
- IDF 2011
- Trade Shows
Cache, Memory Controller & Overclocking Changes
Despite the title of this section, to my knowledge there haven't been any changes to Ivy Bridge's cache. The last level cache (L3) is still shared via a ring bus between all cores, the GPU and the system agent. Quad-core Ivy Bridge CPUs will support up to 8MB of L3 cache, and the private L1/L2s haven't increased from their sizes in Sandy Bridge (32+32K/256K).
The memory controller also remains relatively unchanged, aside from some additional flexibility. Mobile IVB supports DDR3L in addition to DDR3, enabling 1.35V memory instead of the standard 1.5V DDR3. This is particularly useful in notebooks that have on-board DDR3 on the underside of the notebook; OEMs can use DDR3L and keep your lap a bit cooler.
From Nehalem to Sandy Bridge, Intel introduced fairly healthy amounts of power gating throughout the processor. With little more to address in Ivy Bridge, Intel power gated one of the last available portions of the die: the DDR3 interface. If there's no external memory activity, the DDR3 interface can now be turned off completely. External IOs leak current like any other transistor so this change makes sense. Power gating simply increases die size but at 22nm Intel should have some extra area to spend on things like this.
Memory overclocking also gets a bump in Ivy Bridge. The max supported DDR3 frequency in SNB was 2133MHz, Ivy Bridge moves this up to 2800MHz. You can now also increase memory frequency in 200MHz increments.
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Meegulthwarp - Saturday, September 17, 2011 - linkThanks man, you're a star. You really should just ignore whiny comments like mine as you provide some of the best (if not the best) tech articles online and its free of charge! Everytime you push a article like this my life comes to a standstill so I can read it. Keep up the good work!
zshift - Saturday, September 17, 2011 - linkI agree with this 100%. I love reading the articles here on AnandTech. The articles are well written, and provide plenty of charts/data/photos to provide as much of a complete understanding as possible of the product in question.
I also like the fairly recent upsurge in articles, you have a great team here.
PS: Bench rocks!
lowenz - Saturday, September 17, 2011 - linkFrom power page: "Voltage changes have a cubic affect on power"
P ~ C * v^2 * freq * switching activity
know of fence - Saturday, September 17, 2011 - linkCubic as in "to the third power".
I remember a slide from on of the Intel presentations saying that, but i'd like to know how it comes about.
Vcore^3 ~ power
Here somebody posted some data of Vcore vs Power. If you were to plot power consumption in relation to Vcore^3 then one ought to get a linear graph.
KalTorak - Saturday, September 17, 2011 - linkCubic. Because f, for a big chunk of the V-f curve, tends to be linear in V.
gevorg - Saturday, September 17, 2011 - linkWill IVB have 8-core unlocked CPUs like 2500K/2600K SNB?
Sabresiberian - Saturday, September 17, 2011 - link"Ivy Bridge won't get rid of the need for a discrete GPU but, like Sandy Bridge, it is a step in the right direction."
I'm not so sure I'd agree getting rid of the need for a discrete GPU is a good thing. In terms of furthering technological possibilities, yes, I get that; in terms of me building the computer I want to build and tailoring the results to my purposes, I really don't want these things to be tied together in an inflexible way.
platedslicer - Sunday, September 18, 2011 - linkStandardization seems to be the current trend... next thing you know, the computer industry has gone the way of car manufacturers.
JonnyDough - Monday, September 19, 2011 - linkStandards are not all bad. In the case of car manufacturers, we now have things like sealed bearings (so you don't have to regularly grease the bearings in your wheels, and they actually last longer and cost less), safety systems like ABS, seat belts, airbags, etc.
With computers, we need standards as well for compatibility. It lowers cost, ensures that hardware works fluidly between platforms, etc. If we didn't have standards we would have things like rambus - which would only cost us a fortune and slow technological progression.
JonnyDough - Monday, September 19, 2011 - linkI think the author means that you won't NEED a discrete CHIP (GPU other than the one on-die) to run a system. Discrete here seems to imply an IGP (integrated onto the motherboard) OR on a separate graphics card. That isn't to say one won't still be required for graphics intensive applications. Ideally, the on-die GPU will be able to work in tandem when a graphics card is installed.