Core-to-Core Latency

As the core count of modern CPUs is growing, we are reaching a time when the time to access each core from a different core is no longer a constant. Even before the advent of heterogeneous SoC designs, processors built on large rings or meshes can have different latencies to access the nearest core compared to the furthest core. This rings true especially in multi-socket server environments.

But modern CPUs, even desktop and consumer CPUs, can have variable access latency to get to another core. For example, in the first generation Threadripper CPUs, we had four chips on the package, each with 8 threads, and each with a different core-to-core latency depending on if it was on-die or off-die. This gets more complex with products like Lakefield, which has two different communication buses depending on which core is talking to which.

If you are a regular reader of AnandTech’s CPU reviews, you will recognize our Core-to-Core latency test. It’s a great way to show exactly how groups of cores are laid out on the silicon. This is a custom in-house test, and we know there are competing tests out there, but we feel ours is the most accurate to how quick an access between two cores can happen.


(Click on image to enlarge)

Looking at core-to-core latencies going from Alder Lake (12th Gen) to Raptor Lake (13th Gen), things look quite similar on the surface. The P-cores are listed within Windows 11 from cores 0 to 15, and in comparison to Alder Lake, latencies are much the same as what we saw when we reviewed the Core i9-12900K last year. The same comments apply here as with the Core i9-12900K, as we again see more of a bi-directional cache coherence.

Latencies between each Raptor Cove core have actually improved when compared to the Golden Cove cores on Alder Lake from 4.3/4.4 ns, down to 3.8/4.1 ns per each L1 access point.

The biggest difference is the doubling of the E-cores (Gracemont) on the Core i9-13900K, which as a consequence, adds more paths and crossovers. These paths do come with a harsher latency penalty than we saw with the Core i9-12900K, with latencies around the E-cores ranging from 48 to 54 ns within four core jumps between them; this is actually slower than it was on Alder Lake.

One possible reason for the negative latency is the 200 MHz reduction in base frequency on the Gracemont cores on Raptor Lake when compared with Alder Lake. When each E-core (Gracemont) core is communicating with each other, they travel through the L2 cache clusters via the L3 cache ring and back again, which does seem quite an inefficient way to go.

Test Bed and Setup: Updating Our Test Suite for 2023 SPEC2017 Single-Threaded Results
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  • Castillan - Thursday, October 20, 2022 - link

    It never ceases to amaze me how Intel gets away with marketing a 330W+ CPU as a 125W CPU Reply
  • Hulk - Thursday, October 20, 2022 - link

    It's kind of like how you can drive a car rated at 32mpg EPA mileage and have it return 18mpg. Reply
  • boozed - Thursday, October 20, 2022 - link

    It's probably more like the modern turbocharged cars in which no real driver can reach the quoted fuel consumption because the manufacturer cheesed the economy testing. Reply
  • abhaxus - Saturday, October 22, 2022 - link

    Dunno what you mean, I regularly exceed the rated fuel economy for my car (twin turbo V8) as well as rental cars with turbo engines. All it takes is only going on boost when you actually want to go fast. Reply
  • boozed - Saturday, October 22, 2022 - link

    One of the car magazines in Australia consistently had trouble with small European turbo engines using up to twice as much as quoted even when not being pushed hard. BMW was the worst offender. Reply
  • maxijazz - Friday, November 4, 2022 - link

    Define "not being pushed hard". Reply
  • Yojimbo - Thursday, October 20, 2022 - link

    TDP has a technical meaning and Intel (and AMD, because they do they dame thing) are using it properly.

    Intel is even moving away from calling it "TDP" because of consumer, and hardware review sites/channels, misunderstanding of the term.

    In order to understand the situation, go search the anandtech article where Ian Cutress actually suggests Intel do exactly what it is doing to cut down on confusion.
    Reply
  • yh125d - Thursday, October 20, 2022 - link

    It has a technical meaning, but that meaning is not important to consumers/enthusiasts using the machine. It's misleading at best Reply
  • Yojimbo - Thursday, October 20, 2022 - link

    it's not misleading at all. people are just uneducated. Reply
  • yh125d - Thursday, October 20, 2022 - link

    That's absolutely asinine and completely incorrect. 125w TDP can lead people to think that the processor uses around 125w, or is limited to 125w, or that they should plan on cooling around 125w, that they should plan for a PSU load in the 125w range, or that the performance quoted by Intel is produced at around 125w. Because that's what Intel says TDP means. None of these are even a little bit correct. It is entirely misleading, and a completely useless number for consumers. Since AMD's TDP is more accurate (though still off) compared to Intel's, you can't even count on it to indicate which processor might use more power than another. 7950X @ 170w TDP uses less power than 13900k @ 125W TDP in all cases

    From Intel directly: "TDP stands for Thermal Design Power, in watts, and refers to the power consumption under the maximum theoretical load. Power consumption is less than TDP under lower loads. The TDP is the maximum power that one should be designing the system for. This ensures operation to published specs under the maximum theoretical workload."

    By intel's own definition, TDP means exactly what people would expect it to mean, however it is a completely inaccurate number, as Anandtech and others' testing clearly shows. You can act like a knowitall all you want and claim others are just uneducated, but all that does is expose your own ignorance of the situation here.
    Reply

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