Conclusion & First Impressions

Today’s Arm Client TechDay disclosures were generally quite a lot more extensive than in the last few years, especially given the number of new IP releases we’ve covered. Three new CPU microarchitectures, a new DSU/L3 cluster design, and two new SoC interconnect IPs is quite a bit more than we’re used to, and it goes to underscore just how much effort Arm is putting into updating all of the parts of its client IP.

Starting off with the CPUs, the new Cortex-X2 and Cortex-A710 cores are meant to be iterative designs compared to their predecessors, and that's certainly what they are from a performance and efficiency viewpoint. On a generational basis, Arm is promising a 10-16% improvement in IPC. However these figures are somewhat muddled by the fact we’re also comparing 4MB and 8MB L3 caches. Generally, it’s a reasonable expectation of what we’ll be seeing in 2022 devices, but it’s also hard to disambiguate and attribute the performance of the cores versus that of the new DSU-110 L3 cluster design.

Arm has also made some more lofty performance claims when it comes to actual device implementations in 2022, such as +30% peak-to-peak performance boosts on the parts of the X2 cores. Generally, given our expectations that both the next Snapdragon and the next Exynos flagships will come in a similar Samsung foundry process node with smaller improvements, I’m very doubtful we’ll be seeing such larger generational improvements in practice, unless somehow MediaTek surprises us with a flagship X2 SoC made out at TSMC.

While the X2 and A710 aren’t all that groundbreaking, we have to note that the move towards Armv9 brings a lot of new architectural features that would otherwise eat into the expected yearly performance or efficiency improvements. The move to the new ISA baseline has been a long time coming and I’m curious to see what it will enable in terms of media applications (SVE) or AI (new ML instructions).

This is also the fourth and last iteration of Arm’s Austin core family, so hopefully next year’s new Sophia family will see larger generational leaps. Arm admits that we’re nearing diminishing returns and it’s certainly not at the same break-neck pace it was moving a few years ago, but there’s still a lot which can be done.

Today we also saw the unveiling of a brand-new little core in the form of the Cortex-A510. A new clean-sheet design from the Cambridge team, it’s certainly using an innovative approach given its “merged core” design, sharing the L2 cache hierarchy and the FP/SIMD back-end amongst two otherwise full featured cores. The performance and IPC gains are claimed to be quite large at +35-50%, however it seems that this generation hasn’t improved the efficiency curve all that much. It’s still a much better design and will have effective benefits for power efficiency in real-world workloads due to how workloads interact between the little and larger cores, but leaves us with a feeling that it doesn’t provide a knock-out convincing jump we had expected after 4 years. The silver lining here is that Arm is promising further generational improvements in performance and power with subsequent iterations, so we won’t be left with the current state of affairs the same way we saw the Cortex-A55 stagnate.

One of the more key points I saw Arm put their focus on was the new possibilities in larger form-factor devices beyond mobile. The new DSU-110 now supports up to 8 Cortex-X2 cores, a theoretical setup that would pretty much blow away the current Cortex-A76 based Arm laptop SoCs such as the Snapdragon 8cx family. The new cluster design allows for large L3 caches of up to 16MB, and while I don’t know if we’ll see the new interconnect IPs used by the larger vendors, it surely also makes a big argument for larger performance designs. The catch is that if Qualcomm were to adopt and make such a design, it would seemingly be short-lived given their recent Nuvia acquisition and intent on using custom cores. Otherwise, because of a lack of Mali Windows drivers, this really only leaves space for a theoretical Samsung laptop SoC with AMD RDNA GPU, but such a SoC could nonetheless be very successful.

Overall, this year’s CPU and system IP announcements from Arm are extremely solid new IP offerings, really laying down a new foundation, both architecturally with Armv9, and microarchitecturally thanks to elements such as the new DSU and the new little core CPUs. We’re looking forward to the new 2022 SoCs and products that will be powered by the new Arm IP.

A new CI-700 Coherent Interconnect & NI-700 NoC For SoCs
Comments Locked

181 Comments

View All Comments

  • eastcoast_pete - Tuesday, May 25, 2021 - link

    Would be great to see QC roll out new, ARM-based but home-made cores again; however, even if they do, the custom designs will most likely be big cores, which get paired with the 510s. But, maybe QC proves me wrong. That would be nice.
  • nandnandnand - Tuesday, May 25, 2021 - link

    "Because the new complex also only takes up a single interface on the DSU, it also opens up the possibility of designs larger than 8 “cores”, something I hope won’t happen, or hopefully only happens through more middle or big cores."

    Nah, I want a 24-core smartphone posthaste.
  • Kamen Rider Blade - Tuesday, May 25, 2021 - link

    There's no point in putting 24-cores in a SmartPhone, other than to drain your battery faster.

    At the highest end, I think 12-cores in a Top of the line ARM CPU is enough for SmartPhone purposes with this configuration:

    2x BIG; 8x Balanced; 2x little cores.

    That would be enough for most power users to get everything they need out of their CPU's.
  • spaceship9876 - Tuesday, May 25, 2021 - link

    It would be nice if they released a cortex-A35 successor as that is very old.
  • nandnandnand - Tuesday, May 25, 2021 - link

    Plus it could fulfill the efficiency role that A510 apparently fails at.
  • mode_13h - Wednesday, May 26, 2021 - link

    If they're going to continue with that product segment, then ARMv9 will virtually force them to.
  • mode_13h - Tuesday, May 25, 2021 - link

    Can anyone explain the color splotches in the floorplan plots? What are we supposed to glean from those?
  • vvid - Wednesday, May 26, 2021 - link

    >> Can anyone explain the color splotches in the floorplan plots?
    Each color marks specific unit: ALU, FPU, Instruction Decode, Branch predictor, Load/Store, etc
  • mode_13h - Thursday, May 27, 2021 - link

    Thank you!
  • Kamen Rider Blade - Tuesday, May 25, 2021 - link

    So we went from ARM's big.LITTLE

    I prefer the BIG.little stylization.

    to

    BIG.Balanced.little as the new paradigm between ARM Core Types.

Log in

Don't have an account? Sign up now