Understanding Pentium M Architecture

There is no doubt that the Pentium M performs very well as a low power, high performance mobile processor. We published two articles comparing the performance of the Pentium M Athlon 64 and Pentium 4, and in both cases the Pentium M did exceptionally well.

The problem is that until recently, the only mobile platforms were all single channel DDR solutions, making it difficult to extrapolate how the Pentium M would fare against its competition in the desktop world. The desktop Pentium 4 and Athlon 64s aren't equipped with a single channel memory controller and they come in larger cache, higher performance models than in the thin and light systems on the mobile side that you find them.

Before we get to the actual performance comparison, there's a lot that needs to be understood about the Pentium M architecture.

While the underlying architecture of the Pentium M is far more complex than this, the real world application performance of the CPU can be summarized and understood when looking at four points:
  1. High IPC Core
  2. Low Latency L2 Cache
  3. Memory Latency and Bandwidth, and
  4. FPU Performance
The high IPC core has already been explained in previous articles on the Pentium M, as well as briefly recapped in this article. With a shorter pipeline than the Pentium 4, but one longer than the Pentium III, the Pentium M can do more per clock than its more popular desktop cousin - which is why it is able to remain competitive despite its lower clock speeds (much like the Athlon 64).

Through the use of technologies like micro-ops fusion and its sophisticated branch prediction unit, the Pentium M ends up being even more efficient per clock than a Pentium III - despite having a longer pipeline. Based on its SPEC CPU2000 scores, the Pentium M features a 20% higher IPC than the Pentium III at an identical clock speed, despite its longer pipeline. The Pentium M vs. Pentium III comparison is similar to the Prescott vs. Northwood comparison, where the deeper pipelined Prescott was still able to make up for the loss in IPC through increases in efficiency and new branch prediction algorithms.

Problem #2: Total Cost of Ownership Low Latency L2 Cache
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  • bobsmith1492 - Monday, February 7, 2005 - link

    Granted the T8000 here is an Intel fanboy, but please notice Anand was comparing clock-for-clock.
  • T8000 - Monday, February 7, 2005 - link

    There is one big difference between this review and the reviews where the Pentium M did very well: CLOCKSPEED!

    While others where able to get over 2.8 Ghz with aircooling, Anand got just 2.4 Ghz. This may be a coincidence, but it is the difference between surprisingly good performance and a few % below others.

    As most of the benchmarks where based on the stock 2 Ghz, the difference became even greater.

    So this review just shows that the stock speed Pentium M performs about 30% less with about 30% less clockspeed than overclocked versions.

    A slightly redesigned version with higher voltages is not extremely unlikely to hit at least 3 Ghz. Combining that with a desktop chipset will result in stellar performance, as the benchmark scores in this review (x1.5) indicate.

    But since there is no slightly redesigned version and Intel has no good reason to make one, the current Pentium M desktops will only appeal to overclockers and silent computing people.

    Also, for some reason, Anand found the 90W TDP of the 2.4 Ghz A64 closer to the 20W of the P-M than to the 110W of the 3.8 Ghz P4.
  • CSMR - Monday, February 7, 2005 - link

    That's a very good option Zebo, thanks for posting it.
  • teutonicknight - Monday, February 7, 2005 - link

    One suggestion: Why don't you start using a newer version of Premiere for testing? I personally don't use it, but every that I know who does says before Premiere Pro, the program sucked. I'm sure the render results would be much more realistic and accurate if you used a more up to date version of the program
  • Regs - Monday, February 7, 2005 - link

    I was wondering the same thing too Jeff. If you feed it more bandwidth, it would eliminate the pipeline stalls and maybe give it a chance to reach higher clock speeds. Right? Or is it still prohibited by the shorter pipeline to reach higher clock speeds?

    Longer pipeline = wasted clock cycles. But to me that sounds like the PM should actually scale a lot better with a speed boost. Why exactly does it scale badly compared to a P4? Could it be remedied in anyway with a dual channel memory bus?
  • ozzimark - Monday, February 7, 2005 - link

    there's something wrong with the 3400+ in the spec tests. why is the 3000+ beating it consitantly?
  • Warder45 - Monday, February 7, 2005 - link

    Maybe I missed something but I don't see the reason for all the negitivity in the final words. The 2.4Ghz P-M was very close to the A64 2.4Ghz in many of the tests, 3D rendering seemed to slow it down but that looked like it. With better boards and memory the P-M might best the A64 in a clock for clock match up.

    I do agree the prices are way too high. I think Intel really needs to wake up and smell what they have cooking here. With more support and more aggressive priceing they could easily have a winner in the HTPC and SFF markets.
  • plewis00 - Monday, February 7, 2005 - link

    Surely when someone builds a mainboard with the Sonoma (i915) platform using PCI-E and DDR2-533 then it will change. And I wouldn't have thought that's that far off assuming they don't charge rip-off prices for the technology. It would also be perfect for Shuttle systems where the emphasis is on quietness and coolness rather than so much on performance.
  • Zebo - Monday, February 7, 2005 - link

    CSMR
    So's this one very soon..
    http://www.xtremesystems.org/forums/showthread.php...

    ...more than excellent performance wise if Dothan is excellent...power differential hopefully for AMD will be nominal.
  • Sokaku - Monday, February 7, 2005 - link


    While it is true that the A64 has way more bandwidth, I doubt that is the reason why it crushed the P-M in the Professional Applications. I think the real cause is to be found in the P-M's abillity to do FP divisions. The P-III had a pipelined FP unit, however div operations were extremly expensive. My guess would be that Intel haven't thrown much effort into improving on this.

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