Next Generation Improvements

Of course, Montecito is already old news. 90nm is already old news. Strained silicon, low-k dialectrics and phase shifting lithography masks are also old news. Our interests belong to some of the technologies Intel discussed to bring the company out of the 90nm age in two years; into the 65nm interconnect era.

At AnandTech, we love roadmaps - particularly roadmaps with internal code names, wafer sizes and process technology. Stumbling into a development talk at the right time gave us a glimpse at Intel's 6 year plan for lithography.





Intel positioned itself to ramp a new lithography generation every two years - currently the 90nm D1D in Hillsboro, Oregon, houses the development technologies for 2005's introduction of 65nm technology. Some of Intel's most promising technologies fit into a nice line graph plotting process size against time.





Technologies like strained silicon and low-k dialectrics are just first steps for Intel. We are going to give a small primer on as much of these technologies as possible.

Index Lithography
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  • RyanVM - Thursday, September 9, 2004 - link

    I'm trying to figure out if you guys are using "Itanimum" because you're trying to be witty or just don't know that its name is "Itanium". I think my sarcasm meter might be broken.
  • mrmorris - Thursday, September 9, 2004 - link

    Interesting article, looking forward to getting "the big picture" when Intel competite technology is included (AMD).
  • PrinceGaz - Thursday, September 9, 2004 - link

    1T-SRAM is basically DRAM with a built in controller that handles all the refreshing etc, so it can be used in a similar way to SRAM.

    Because it uses DRAM technology, its nowhere near as fast as true SRAM and therefore unsuitable for use as cache memory.
  • Skykat - Thursday, September 9, 2004 - link

    As I recall, the Nintendo Gamecube uses 1T-SRAM (1 transistor). Whatever happened to this technology? It would seem a lot more efficient than 6 Transistor SRAM. I think the Gamecube processor was manufactured by IBM though...
  • ncage - Thursday, September 9, 2004 - link

    #5 speed is NOT the ideal thing for what itanimum was made for. Itanimum is made for high end servers where caching is just as important as speed. Think of the high end scientific apps where the majority of the work is swapping data back and forth from ram to peform calculations on. Ya they could speed up the cpu but it would be cache starved and would be ide wile it was waiting to fetch data from main memory into cache/registers. Lots of cache is also ideal for large database appliations. One thing i am suprised is intel has not decided to go with an on die memory controller like AMD.
  • mkruer - Thursday, September 9, 2004 - link

    When I said double up on the logic I meant parallel processing, not making the logic more complex.
  • mkruer - Thursday, September 9, 2004 - link

    I will not say that I am disappointed, but I think I could sum this article up much faster, Intel has Awesome FAB capabilities, but too bad their chip designs are not the greatest. One day Intel might lean that instead of throwing huge amounts of cache to get everything to work faster, to double up on the logic. Just imagine if the Itanimum was cache efficient, with the amount of chip real-estate they could save they could easily double the core logic, and get a true boot in performance.
  • nourdmrolNMT1 - Thursday, September 9, 2004 - link

    i agree with number 3.

    MIKE
  • CrimsonDeath - Thursday, September 9, 2004 - link

    Wow i feel really stupid right now...
  • Johnmcl7 - Thursday, September 9, 2004 - link

    Yeah, I fully agree I was a little disappointed the article seemed to end rather abruptly, however it was an interesting read otherwise.

    Also, shouldn't it be 'extensions of Moore's Law' rather than 'extentions'?

    John

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