Continuing to ride the train of success that AMD has had in 2004, AMD is announcing today the completion of design work on their first dual-core Opteron processor and the beginning of the tape-out process for that core. While the first dual core CPUs won't be available until the middle of next year at the earliest, AMD sees the beginning of the first dual core tapeout as a pretty monumental step in their microprocessor evolution.

AMD is not providing much information about the new dual core CPUs other than a low-resolution die shot and a roadmap; luckily we can derive a decent amount of information from the die shot, so let's get to it.

First, here's a shot of a current generation 130nm Opteron die:

You can see that the majority of the functional units are on the left of the die and the L2 cache and the 128-bit memory interface are both on the right of the die. Now let's take a look at the finalized design for the first 90nm dual core Opteron die:

As we mentioned earlier, the image is relatively low-res so you can't see much detail in it but you should be able to see two distinct cores. Although AMD isn't commenting on any of the details of the implementation, it appears as if the first dual core Opterons are basically two Opterons connected together on a single die - meaning each core has its own L2 cache. Here's a good idea of what you're probably seeing above:

The DDR memory interface appears to wrap around both L2 caches, meaning that it looks like both cores have their own 128-bit memory interface; whether or not both memory controllers will be enabled is another thing, but if this is true we have a number of implications to talk about.

If dual core Opterons do indeed have two memory controllers, the pincount of dual core Opterons will go up significantly - it will also make them incompatible with current sockets. AMD is all about maintaining socket compatibility so it is quite possible that they could only leave half of the memory controllers enabled, in order to offer Socket-940 dual core Opterons. AMD isn't being very specific in terms of implementation details, but these are just some of the options.

AMD did mention that they will eventually start referring to Opteron server configurations according to the number of sockets, not CPUs, the platform is capable of supporting. For example, a 1 socket Opteron server could either be a 1-way or a 2-way configuration, depending on whether a single or dual core Opteron is used.

AMD's Dual Core Roadmap


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  • Anemone - Monday, June 14, 2004 - link

    It's worth reiterating that this is OPTERON chips. AMD has stated several times that it has NO plans at the moment to bring dual cores to the desktop. Since you can well imagine what a double FX chip would cost I think you can easily see why...

    So yep exciting news, but none of this is for a 939 socket, even with a single memory controller.
  • eRacer - Monday, June 14, 2004 - link

    AMD confirmed in the Infoworld article below that the dual core CPUs will only have one memory controller.

    "AMD's dual-core server processors will share a single memory controller, Weber said. This won't create a bottleneck because a server with two Opteron chips, and therefore two memory controllers, already has more than enough memory bandwidth required to run that system, he said."
  • Doormat - Monday, June 14, 2004 - link

    The article is here...
  • Pumpkinierre - Monday, June 14, 2004 - link

    I'm still wondering about that P4 720 3.73Gig and 2Mb of cache, lumped in with the banias and dothans in the roadmap, that's supposed to be coming out before year's end. I get the feeling that both companies are pushing their dual core R&D at highest priority.
  • Doormat - Monday, June 14, 2004 - link

    If I remember right, I saw many stories around the web saying every opteron's memory controller had two imput ports to the memory controller from the CPU. Thus, you can go dual core and NOT need to redesign the memory controller at all, and you wont need to change the pinout on the socket. Thus you could take out a single core S940 opteron and put in a dual core opteron. Power issues are the only thing complicating it I believe. Reply
  • quanta - Monday, June 14, 2004 - link

    I suspect the Opteron 8xx's can do a lot more than 16-way processing. Opteron 8xx has 3 HyperTransport ports that can connect to 3 other CPUs. If the HT ports are connected differently from what was suggested by AMD, it can theoretically run an infinitely long chain of processors.

    As interesting as 2x128-bit memory controllers are, having to install 4 memory modules is a little excessive to most, and most likely requires registered DIMM or Intel's FB-DIMM to work. Hopefully there will be 256/288-bit memory modules when dual core Opteron arrives.
  • AtaStrumf - Monday, June 14, 2004 - link

    It could get the No.1 spot in folding in about 2 days :) Reply
  • Runamile - Monday, June 14, 2004 - link

    dang, 16 way proccessing on one board? I assume i'm reading the roadmap right. Saying the 1xx series, dual core, is actually 2 proccessors. That would mean the 8xx series supports 16. Just think what a Rackable stand with 80 servers, each with 16x854's Optrons can do. 1280 Optrons working an parallel on one rack. Holy Cow. Reply
  • GokieKS - Monday, June 14, 2004 - link

    It would be, but I imagine AMD might save that as their trump card if they really do need it, especially since the whole S940/939 fiasco already managed to annoy people, and another socket change would go even furthur in that.

  • Nighteye2 - Monday, June 14, 2004 - link

    Are those all implications? If AMD does decide to activate both memory controllers, it would have big advantages in UMA-enabled operating systems like Longhorn will be. You'd have twice dual-channel memory bandwidth in that situation, which is potentially a big advantage compared to Intel's dual-core offerings.

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