The iPhone XS & XS Max Review: Unveiling the Silicon Secrets
by Andrei Frumusanu on October 5, 2018 8:00 AM EST- Posted in
- Mobile
- Apple
- Smartphones
- iPhone XS
- iPhone XS Max
The A12 Vortex CPU µarch
When talking about the Vortex microarchitecture, we first need to talk about exactly what kind of frequencies we’re seeing on Apple’s new SoC. Over the last few generations Apple has been steadily raising frequencies of its big cores, all while also raising the microarchitecture’s IPC. I did a quick test of the frequency behaviour of the A12 versus the A11, and came up with the following table:
Maximum Frequency vs Loaded Threads Per-Core Maximum MHz |
||||||
Apple A11 | 1 | 2 | 3 | 4 | 5 | 6 |
Big 1 | 2380 | 2325 | 2083 | 2083 | 2083 | 2083 |
Big 2 | 2325 | 2083 | 2083 | 2083 | 2083 | |
Little 1 | 1694 | 1587 | 1587 | 1587 | ||
Little 2 | 1587 | 1587 | 1587 | |||
Little 3 | 1587 | 1587 | ||||
Little 4 | 1587 | |||||
Apple A12 | 1 | 2 | 3 | 4 | 5 | 6 |
Big 1 | 2500 | 2380 | 2380 | 2380 | 2380 | 2380 |
Big 2 | 2380 | 2380 | 2380 | 2380 | 2380 | |
Little 1 | 1587 | 1562 | 1562 | 1538 | ||
Little 2 | 1562 | 1562 | 1538 | |||
Little 3 | 1562 | 1538 | ||||
Little 4 | 1538 |
Both the A11 and A12’s maximum frequency is actually a single-thread boost clock – 2380MHz for the A11’s Monsoon cores and 2500MHz for the new Vortex cores in the A12. This is just a 5% boost in frequency in ST applications. When adding a second big thread, both the A11 and A12 clock down to respectively 2325 and 2380MHz. It’s when we are also concurrently running threads onto the small cores that things between the two SoCs diverge: while the A11 further clocks down to 2083MHz, the A12 retains the same 2380 until it hits thermal limits and eventually throttles down.
On the small core side of things, the new Tempest cores are actually clocked more conservatively compared to the Mistral predecessors. When the system just had one small core running on the A11, this would boost up to 1694MHz. This behaviour is now gone on the A12, and the clock maximum clock is 1587MHz. The frequency further slightly reduces to down to 1538MHz when there’s four small cores fully loaded.
Much improved memory latency
As mentioned in the previous page, it’s evident that Apple has put a significant amount of work into the cache hierarchy as well as memory subsystem of the A12. Going back to a linear latency graph, we see the following behaviours for full random latencies, for both big and small cores:
The Vortex cores have only a 5% boost in frequency over the Monsoon cores, yet the absolute L2 memory latency has improved by 29% from ~11.5ns down to ~8.8ns. Meaning the new Vortex cores’ L2 cache now completes its operations in a significantly fewer number of cycles. On the Tempest side, the L2 cycle latency seems to have remained the same, but again there’s been a large change in terms of the L2 partitioning and power management, allowing access to a larger chunk of the physical L2.
I only had the test depth test up until 64MB and it’s evident that the latency curves don’t flatten out yet in this data set, but it’s visible that latency to DRAM has seen some improvements. The larger difference of the DRAM access of the Tempest cores could be explained by a raising of the maximum memory controller DVFS frequency when just small cores are active – their performance will look better when there’s also a big thread on the big cores running.
The system cache of the A12 has seen some dramatic changes in its behaviour. While bandwidth is this part of the cache hierarchy has seen a reduction compared to the A11, the latency has been much improved. One significant effect here which can be either attributed to the L2 prefetcher, or what I also see a possibility, prefetchers on the system cache side: The latency performance as well as the amount of streaming prefetchers has gone up.
Instruction throughput and latency
Backend Execution Throughput and Latency | ||||||||
Cortex-A75 | Cortex-A76 | Exynos-M3 | Monsoon | Vortex | |||||
Exec | Lat | Exec | Lat | Exec | Lat | Exec | Lat | |
Integer Arithmetic ADD |
2 | 1 | 3 | 1 | 4 | 1 | 6 | 1 |
Integer Multiply 32b MUL |
1 | 3 | 1 | 2 | 2 | 3 | 2 | 4 |
Integer Multiply 64b MUL |
1 | 3 | 1 | 2 | 1 (2x 0.5) |
4 | 2 | 4 |
Integer Division 32b SDIV |
0.25 | 12 | 0.2 | < 12 | 1/12 - 1 | < 12 | 0.2 | 10 | 8 |
Integer Division 64b SDIV |
0.25 | 12 | 0.2 | < 12 | 1/21 - 1 | < 21 | 0.2 | 10 | 8 |
Move MOV |
2 | 1 | 3 | 1 | 3 | 1 | 3 | 1 |
Shift ops LSL |
2 | 1 | 3 | 1 | 3 | 1 | 6 | 1 |
Load instructions | 2 | 4 | 2 | 4 | 2 | 4 | 2 | |
Store instructions | 2 | 1 | 2 | 1 | 1 | 1 | 2 | |
FP Arithmetic FADD |
2 | 3 | 2 | 2 | 3 | 2 | 3 | 3 |
FP Multiply FMUL |
2 | 3 | 2 | 3 | 3 | 4 | 3 | 4 |
Multiply Accumulate MLA |
2 | 5 | 2 | 4 | 3 | 4 | 3 | 4 |
FP Division (S-form) | 0.2-0.33 | 6-10 | 0.66 | 7 | >0.16 | 12 | 0.5 | 1 | 10 | 8 |
FP Load | 2 | 5 | 2 | 5 | 2 | 5 | ||
FP Store | 2 | 1-N | 2 | 2 | 2 | 1 | ||
Vector Arithmetic | 2 | 3 | 2 | 2 | 3 | 1 | 3 | 2 |
Vector Multiply | 1 | 4 | 1 | 4 | 1 | 3 | 3 | 3 |
Vector Multiply Accumulate | 1 | 4 | 1 | 4 | 1 | 3 | 3 | 3 |
Vector FP Arithmetic | 2 | 3 | 2 | 2 | 3 | 2 | 3 | 3 |
Vector FP Multiply | 2 | 3 | 2 | 3 | 1 | 3 | 3 | 4 |
Vector Chained MAC (VMLA) |
2 | 6 | 2 | 5 | 3 | 5 | 3 | 3 |
Vector FP Fused MAC (VFMA) |
2 | 5 | 2 | 4 | 3 | 4 | 3 | 3 |
To compare the backend characteristics of Vortex, we’ve tested the instruction throughput. The backend performance is determined by the amount of execution units and the latency is dictated by the quality of their design.
The Vortex core looks pretty much the same as the predecessor Monsoon (A11) – with the exception that we’re seemingly looking at new division units, as the execution latency has seen a shaving of 2 cycles both on the integer and FP side. On the FP side the division throughput has seen a doubling.
Monsoon (A11) was a major microarchitectural update in terms of the mid-core and backend. It’s there that Apple had shifted the microarchitecture in Hurricane (A10) from a 6-wide decode from to a 7-wide decode. The most significant change in the backend here was the addition of two integer ALU units, upping them from 4 to 6 units.
Monsoon (A11) and Vortex (A12) are extremely wide machines – with 6 integer execution pipelines among which two are complex units, two load/store units, two branch ports, and three FP/vector pipelines this gives an estimated 13 execution ports, far wider than Arm’s upcoming Cortex A76 and also wider than Samsung’s M3. In fact, assuming we're not looking at an atypical shared port situation, Apple’s microarchitecture seems to far surpass anything else in terms of width, including desktop CPUs.
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name99 - Friday, October 5, 2018 - link
"I do hope Samsung and Apple alike would be able to focus more on optimising this, as like we’re about to see, it will have an impact on battery life."Presumably Apple's longer term plan (next year?) is to move to the LTPO technology in the aWatch4 display?
https://appleinsider.com/articles/18/08/24/future-...
https://www.reddit.com/r/apple/comments/9ga4wa/dis...
This appears to be an Apple specific (ie non-Samsung) tech, though who knows exactly what the web of patents and manufacturing agreements ultimately specifies...
SanX - Friday, October 5, 2018 - link
Similar to mobile processors performance surpassing some desktop ones, the mobile devices image quality also surpassing 5-7 years old DSLR tech. Your photo test suite would be great if it adds the Still Life, Resolution and Portrait tests from the pro photo testing sites like Imaging-resource dot com. I'd just send the phones to these folks and they do their tests so we would see the progress in comparison with all cameras of all times and manufacturers. Right now only the fields tests of Anandtech look poor and are not enough to tell what is good and what is missing in the cameras. Due to the great progress, the time for such new deep testing of mobile devices came right now.Pneumothorax - Sunday, October 7, 2018 - link
No way my Xs Max is touching my 10 year old D700 with a cheap $100 50 1.8 lens in anything over base iso. The iPhone starts applying some serious noise reduction at higher ISO’s making it watercolor like. Even at base iso, the D700 has much better fine detail.Constructor - Sunday, October 7, 2018 - link
Not to dispute your fundamental point (bigger lenses and bigger sensors can't really be replaced), but there are several low-light photo apps for the iPhone which support much longer exposure than the standard one and this can of course help at least with static images when you've got a fixed position for the iPhone.yvn - Friday, October 5, 2018 - link
I was surprised you said excellent viewing angle, I disagree! If you tilt the screen just a little up or down, left or right, the color changes a lot, it becomes more blue as you tilt more and I couldn’t get used to this so I returned the phone, my iPhone 7 Plus had no such behavior.Notmyusualid - Friday, October 5, 2018 - link
So... dual-sim finally (only phone type I buy), 4x4 MIMO, 7nm, but still no Android?!?Would it KILL Apple to offer an Android version, I mean really, would it? Even Sony broke in the end...
Guess they don't need my money, but nice handset, if a bit pricey.
cfenton - Saturday, October 6, 2018 - link
I can't tell if this is a serious comment. Apple makes something like 85% of the profit in the mobile phone market. They have absolutely no reason to even consider putting out an Android phone.Speedfriend - Tuesday, October 9, 2018 - link
Oh, that rubbish stat again. That is only in the narrowly defined mobile market. Apple makes its own OS, designs many of its own chips and controllers, sells its own insurance, runs its own app store and its own retail shops. It has many more parts of the overall value chain. For an accurate comparison, we would need to include what Qualcomm and Samsung make from SOCs, what Samsung and LG make from screens, what Samsung makes from memory etc.varase - Tuesday, October 23, 2018 - link
What, you kidding?I'm sure one reason for the push into custom silicon was because it was one thing Android OEMs couldn't copy.
Hifihedgehog - Saturday, October 6, 2018 - link
I am a little confused here by your rather bold assertion of desktop-class performance. Correct me if I am wrong, but aren’t the test results here for SPECint2006 inclusive of all cores whereas the Intel processor’s score you linked to is for a single thread. If so, then comparing six cores versus a single thread in a multithreaded desktop CPU is not very fair or valid. Again, I could be totally wrong but I just wanted to point this out.