NVIDIA GeForce 6800 Ultra: The Next Step Forward

... And the Pipeline

The end of the pipeline consists of the ROP pixel pipeline. These are the units that take care of antialiasing, as well as z and color compression and final drawing of a pixel. There are 16 of these units, and they are capable of either computing one color+z pixel, or calculating 2 z/stencil operations per clock. This means that 32 z or stencil operations (think shadowing), or 16 pixels can be drawn per clock cycle. Thus NVIDIA has dubbed this architecture a 16x1 / 32x0 architecture. On a side note, they have retroactively dubbed the NV3x a 4x2 / 8x0 architecture.

Again, the antialiasing done in this unit is rotated grid multisample, Multiple Render Targets are supported, and floating point blending can be done.

Actually, this time around, NVIDIA is supporting front to back fp16 all the way from the software to the framebuffer. This will assist in things like HDR rendering, as the fp16 (or fp32) data calculated in the pixel shaders no longer needs to be converted to 8bit integer color for display.

Of course, we always have to wait a while before we can see the good stuff that comes of all this technology. So what else does this card have to offer?