The AMD Vega GPU Architecture Teaser: Higher IPC, Tiling, & More, Coming in H1’2017by Ryan Smith on January 5, 2017 9:00 AM EST
First Thoughts: A Peek At What’s To Come
Wrapping things up, while today’s reveal from AMD is only a teaser of what they have been working on over the last few years with Vega, it’s none the less an important one. Based on what we know so far, Vega stands to be the biggest change to AMD’s GPU architecture since GCN 1.0 was released 5 years ago, and the changes to the ALUs, the ROPs, the memory structure, and other aspects of Vega reinforce this notion. To be sure, Vega is not a wholly new architecture – it is clearly a further refinement of GCN – but then this is exactly why GCN was designed to be able to evolve through refinements over a very long period of time.
What we have for now then is a quick look at what’s to come from AMD. There are still many things we don’t know, not the least of which is the actual GPU configurations. But for a teaser it’s enough to show that AMD has been hard at work. It sets the stage for the hardware and marketing ramp-up to come over the next few months.
But for now, let’s close with an image. As I mentioned before, the first Vega has taped out, and Radeon Technology Group’s frontman and Chief Architect, Raja Koduri, has one. The chip was just a few weeks old as of December, and while trying to discern die size may be a little too error-prone, we can see one important detail: 2 HBM2 packages.
Raja and AMD will not tell us what chip we’re looking at – like Polaris, two Vega chips have been confirmed – but either way we are looking at one of them in all its alpha silicon glory. Bearing in mind HBM2’s much greater bandwidth per pin, we could very well be looking at a design for a Fiji-like 512GB/sec of memory bandwidth in the chip Raja holds. And for AMD, that is one more teaser for today to keep attention focused right where they want it: on Vega ahead of its H1’17 launch.